/* RSD PTR: OEM=FTS, ACPI_Rev=2.0x (2) XSDT=0x00000000da053090, length=36, cksum=61 */ /* XSDT: Length=156, Revision=1, Checksum=47, OEMID=FTS, OEM Table ID=D3219-A1, OEM Revision=0x1072009, Creator ID=AMI, Creator Revision=0x10013 Entries={ 0x00000000da0608f0, 0x00000000da060a00, 0x00000000da060a78, 0x00000000da060ac0, 0x00000000da061000, 0x00000000da061af0, 0x00000000da061b30, 0x00000000da061b68, 0x00000000da061ed8, 0x00000000da065400, 0x00000000da065430, 0x00000000da0654e8, 0x00000000da065618, 0x00000000da065848, 0x00000000da0658f0 } */ /* FACP: Length=268, Revision=5, Checksum=108, OEMID=FTS, OEM Table ID=D3219-A1, OEM Revision=0x1072009, Creator ID=AMI, Creator Revision=0x10013 FACS=0xda80ef80, DSDT=0xda0531b8 INT_MODEL=APIC Preferred_PM_Profile=Desktop (1) SCI_INT=9 SMI_CMD=0xb2, ACPI_ENABLE=0xa0, ACPI_DISABLE=0xa1, S4BIOS_REQ=0x0 PSTATE_CNT=0x0 PM1a_EVT_BLK=0x1800-0x1803 PM1a_CNT_BLK=0x1804-0x1805 PM2_CNT_BLK=0x1850-0x1850 PM_TMR_BLK=0x1808-0x180b GPE0_BLK=0x1820-0x182f P_LVL2_LAT=101 us, P_LVL3_LAT=1001 us FLUSH_SIZE=1024, FLUSH_STRIDE=16 DUTY_OFFSET=0, DUTY_WIDTH=0 DAY_ALRM=13, MON_ALRM=0, CENTURY=50 IAPC_BOOT_ARCH={LEGACY_DEVICES} Flags={WBINVD,C1_SUPPORTED,SLEEP_BUTTON,S4_RTC_WAKE,RESET_REGISTER,PLATFORM_CLOCK,S4_RTC_VALID,REMOTE_POWER_ON} RESET_REG=0xcf9:0[8] (IO), RESET_VALUE=0x6 ArmBootFlags={} MinorRevision=0 X_FACS=0x0000000000000000, X_DSDT=0x00000000da0531b8 X_PM1a_EVT_BLK=0x1800:0[32] (IO) X_PM1a_CNT_BLK=0x1804:0[16] (IO) X_PM2_CNT_BLK=0x1850:0[8] (IO) X_PM_TMR_BLK=0x1808:0[32] (IO) X_GPE0_BLK=0x1820:0[128] (IO) */ /* FACS: Length=64, HwSig=0x737d903d, Firm_Wake_Vec=0x00000000 Global_Lock={} Flags={} Version=2 OspmFlags={} */ /* DSDT: Length=55093, Revision=2, Checksum=164, OEMID=FTS, OEM Table ID=D3219-A1, OEM Revision=0x114, Creator ID=INTL, Creator Revision=0x20091112 */ /* APIC: Length=114, Revision=3, Checksum=255, OEMID=FTS, OEM Table ID=D3219-A1, OEM Revision=0x1072009, Creator ID=AMI, Creator Revision=0x10013 Local APIC ADDR=0xfee00000 Flags={PC-AT} Type=Local APIC ACPI CPU=1 Flags={ENABLED} APIC ID=0 Type=Local APIC ACPI CPU=2 Flags={ENABLED} APIC ID=2 Type=Local APIC ACPI CPU=3 Flags={ENABLED} APIC ID=4 Type=Local APIC ACPI CPU=4 Flags={ENABLED} APIC ID=6 Type=IO APIC APIC ID=8 INT BASE=0 ADDR=0x00000000fec00000 Type=INT Override BUS=0 IRQ=0 INTR=2 Flags={Polarity=conforming, Trigger=conforming} Type=INT Override BUS=0 IRQ=9 INTR=9 Flags={Polarity=active-hi, Trigger=level} Type=Local APIC NMI ACPI CPU=ALL LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} */ /* FPDT: Length=68, Revision=1, Checksum=49, OEMID=FTS, OEM Table ID=D3219-A1, OEM Revision=0x1072009, Creator ID=AMI, Creator Revision=0x10013 Data={ 46 50 44 54 44 00 00 00 01 31 46 54 53 20 20 20 44 33 32 31 39 2d 41 31 09 20 07 01 41 4d 49 20 13 00 01 00 01 00 10 01 00 00 00 00 30 f0 f4 db 00 00 00 00 00 00 10 01 00 00 00 00 50 f0 f4 db 00 00 00 00 } */ /* SSDT: Length=1337, Revision=1, Checksum=196, OEMID=PmRef, OEM Table ID=Cpu0Ist, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20120711 Data={ 53 53 44 54 39 05 00 00 01 c4 50 6d 52 65 66 00 43 70 75 30 49 73 74 00 00 30 00 00 49 4e 54 4c 11 07 12 20 10 44 51 5c 2e 5f 50 52 5f 43 50 55 30 08 5f 50 50 43 00 14 40 06 5f 50 43 54 00 70 5c 2e 5f 50 52 5f 43 50 50 43 5c 2f 03 5f 50 52 5f 43 50 55 30 5f 50 50 43 a0 3e 90 7b 43 46 47 44 01 00 7b 50 44 43 30 01 00 a4 12 2c 02 11 14 0a 11 82 0c 00 7f 00 00 00 00 00 00 00 00 00 00 00 79 00 11 14 0a 11 82 0c 00 7f 00 00 00 00 00 00 00 00 00 00 00 79 00 08 5f 50 53 53 12 43 21 10 12 20 06 0c e5 0c 00 00 0c 20 48 01 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 25 00 00 0c 00 25 00 00 12 20 06 0c e4 0c 00 00 0c 20 48 01 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 21 00 00 0c 00 21 00 00 12 20 06 0c 1c 0c 00 00 0c 3d 2a 01 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 1f 00 00 0c 00 1f 00 00 12 20 06 0c 54 0b 00 00 0c 99 10 01 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 1d 00 00 0c 00 1d 00 00 12 20 06 0c f0 0a 00 00 0c 23 04 01 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 1c 00 00 0c 00 1c 00 00 12 20 06 0c 28 0a 00 00 0c f8 eb 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 1a 00 00 0c 00 1a 00 00 12 20 06 0c 60 09 00 00 0c ad d4 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 18 00 00 0c 00 18 00 00 12 20 06 0c 98 08 00 00 0c 56 be 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 16 00 00 0c 00 16 00 00 12 20 06 0c d0 07 00 00 0c da a8 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 14 00 00 0c 00 14 00 00 12 20 06 0c 6c 07 00 00 0c 70 9e 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 13 00 00 0c 00 13 00 00 12 20 06 0c a4 06 00 00 0c 45 8a 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 11 00 00 0c 00 11 00 00 12 20 06 0c dc 05 00 00 0c fd 76 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 0f 00 00 0c 00 0f 00 00 12 20 06 0c 14 05 00 00 0c 85 64 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 0d 00 00 0c 00 0d 00 00 12 20 06 0c b0 04 00 00 0c 99 5b 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 0c 00 00 0c 00 0c 00 00 12 20 06 0c e8 03 00 00 0c 63 4a 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 0a 00 00 0c 00 0a 00 00 12 20 06 0c 20 03 00 00 0c f5 39 00 00 0c 0a 00 00 00 0c 0a 00 00 00 0c 00 08 00 00 0c 00 08 00 00 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 12 20 06 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 0c 00 00 00 80 08 50 53 44 46 00 14 4b 04 5f 50 53 44 00 a0 2e 92 50 53 44 46 70 54 43 4e 54 88 83 88 48 50 53 44 00 00 0a 04 00 70 54 43 4e 54 88 83 88 53 50 53 44 00 00 0a 04 00 70 ff 50 53 44 46 a0 0f 7b 50 44 43 30 0b 00 08 00 a4 48 50 53 44 a4 53 50 53 44 08 48 50 53 44 12 0d 01 12 0a 05 0a 05 00 00 0a fe 0a 80 08 53 50 53 44 12 0d 01 12 0a 05 0a 05 00 00 0a fc 0a 80 } */ /* SSDT: Length=2796, Revision=1, Checksum=57, OEMID=PmRef, OEM Table ID=CpuPm, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20120711 Data={ 53 53 44 54 ec 0a 00 00 01 39 50 6d 52 65 66 00 43 70 75 50 6d 00 00 00 00 30 00 00 49 4e 54 4c 11 07 12 20 10 4c 0b 5c 00 08 53 53 44 54 12 43 05 0c 0d 43 50 55 30 49 53 54 20 00 0c 98 ea 01 d8 0c 39 05 00 00 0d 41 50 49 53 54 20 20 20 00 0c 18 26 04 da 0c aa 05 00 00 0d 43 50 55 30 43 53 54 20 00 0c 18 2c 04 da 0c d3 03 00 00 0d 41 50 43 53 54 20 20 20 00 0c 98 1d 04 da 0c 19 01 00 00 08 5c 50 44 43 30 0c 00 00 00 80 08 5c 50 44 43 31 0c 00 00 00 80 08 5c 50 44 43 32 0c 00 00 00 80 08 5c 50 44 43 33 0c 00 00 00 80 08 5c 50 44 43 34 0c 00 00 00 80 08 5c 50 44 43 35 0c 00 00 00 80 08 5c 50 44 43 36 0c 00 00 00 80 08 5c 50 44 43 37 0c 00 00 00 80 08 5c 53 44 54 4c 00 10 44 0e 5c 5f 50 52 5f 5b 80 50 50 4d 54 00 0c 98 cf 80 da 0b 3a 00 5b 81 4c 0c 50 50 4d 54 10 50 47 52 56 08 43 46 47 44 20 00 08 41 43 52 54 08 41 50 53 56 08 41 41 43 30 08 43 50 49 44 20 43 50 50 43 08 43 43 54 50 08 43 4c 56 4c 08 43 42 4d 49 08 50 4c 31 30 10 50 4c 32 30 10 50 4c 57 30 08 43 54 43 30 08 54 41 52 30 08 50 50 43 30 08 50 4c 31 31 10 50 4c 32 31 10 50 4c 57 31 08 43 54 43 31 08 54 41 52 31 08 50 50 43 31 08 50 4c 31 32 10 50 4c 32 32 10 50 4c 57 32 08 43 54 43 32 08 54 41 52 32 08 50 50 43 32 08 43 33 4d 57 08 43 36 4d 57 08 43 37 4d 57 08 43 44 4d 57 08 43 33 4c 54 10 43 36 4c 54 10 43 37 4c 54 10 43 44 4c 54 10 43 44 4c 56 10 43 44 50 57 10 4d 50 4d 46 08 10 43 24 5c 2e 5f 50 52 5f 43 50 55 30 08 48 49 30 5f 00 08 48 43 30 5f 00 14 3c 5f 50 44 43 01 a0 27 5b 12 5c 2f 03 5f 50 52 5f 43 50 55 30 5f 50 50 43 00 70 43 50 50 43 5c 2f 03 5f 50 52 5f 43 50 55 30 5f 50 50 43 70 43 50 44 43 68 60 47 43 41 50 60 a4 60 14 17 5f 4f 53 43 04 70 43 4f 53 43 68 69 6a 6b 60 47 43 41 50 60 a4 60 14 48 06 43 50 44 43 01 8a 68 00 52 45 56 53 8a 68 0a 04 53 49 5a 45 70 87 68 60 70 74 60 0a 08 00 61 5b 13 68 0a 40 77 61 0a 08 00 54 45 4d 50 08 53 54 53 30 11 07 0a 04 00 00 00 00 73 53 54 53 30 54 45 4d 50 62 a4 43 4f 53 43 11 13 0a 10 16 a6 77 40 0c 29 be 47 9e bd d8 70 58 71 39 53 52 45 56 53 53 49 5a 45 62 14 4d 0b 43 4f 53 43 04 8a 6b 00 53 54 53 30 8a 6b 0a 04 43 41 50 30 8a 68 00 49 49 44 30 8a 68 0a 04 49 49 44 31 8a 68 0a 08 49 49 44 32 8a 68 0a 0c 49 49 44 33 08 55 49 44 30 11 13 0a 10 16 a6 77 40 0c 29 be 47 9e bd d8 70 58 71 39 53 8a 55 49 44 30 00 45 49 44 30 8a 55 49 44 30 0a 04 45 49 44 31 8a 55 49 44 30 0a 08 45 49 44 32 8a 55 49 44 30 0a 0c 45 49 44 33 a0 32 92 90 90 93 49 49 44 30 45 49 44 30 93 49 49 44 31 45 49 44 31 90 93 49 49 44 32 45 49 44 32 93 49 49 44 33 45 49 44 33 70 0a 06 53 54 53 30 a4 6b a0 0e 92 93 69 01 70 0a 0a 53 54 53 30 a4 6b a4 6b 14 4e 0a 47 43 41 50 01 8a 68 00 53 54 53 30 8a 68 0a 04 43 41 50 30 a0 12 91 93 53 54 53 30 0a 06 93 53 54 53 30 0a 0a a4 00 a0 16 7b 53 54 53 30 01 00 7b 43 41 50 30 0b ff 0b 43 41 50 30 a4 00 7d 7b 50 44 43 30 0c ff ff ff 7f 00 43 41 50 30 50 44 43 30 a0 47 05 7b 43 46 47 44 0a 7a 00 a0 4c 04 90 90 7b 43 46 47 44 0b 00 02 00 7b 50 44 43 30 0a 18 00 92 7b 53 44 54 4c 0a 02 00 7d 53 44 54 4c 0a 02 53 44 54 4c 5b 80 43 53 54 30 00 83 88 53 53 44 54 0a 07 00 83 88 53 53 44 54 0a 08 00 5b 20 43 53 54 30 48 43 30 5f a4 00 10 43 18 5c 2e 5f 50 52 5f 43 50 55 31 08 48 49 31 5f 00 08 48 43 31 5f 00 14 1f 5f 50 44 43 01 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 50 44 43 68 60 47 43 41 50 60 a4 60 14 22 5f 4f 53 43 04 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 4f 53 43 68 69 6a 6b 60 47 43 41 50 60 a4 60 14 4e 07 47 43 41 50 01 8a 68 00 53 54 53 31 8a 68 0a 04 43 41 50 31 a0 12 91 93 53 54 53 31 0a 06 93 53 54 53 31 0a 0a a4 00 a0 16 7b 53 54 53 31 01 00 7b 43 41 50 31 0b ff 0b 43 41 50 31 a4 00 7d 7b 50 44 43 31 0c ff ff ff 7f 00 43 41 50 31 50 44 43 31 a0 10 93 7b 50 44 43 31 0a 09 00 0a 09 41 50 50 54 a0 0d 7b 50 44 43 31 0a 18 00 41 50 43 54 70 50 44 43 31 50 44 43 30 a4 00 14 44 05 41 50 43 54 00 a0 4c 04 90 7b 43 46 47 44 0b 00 02 00 90 7b 43 46 47 44 0a 7a 00 92 7b 53 44 54 4c 0a 20 00 7d 53 44 54 4c 0a 20 53 44 54 4c 5b 80 43 53 54 31 00 83 88 53 53 44 54 0a 0a 00 83 88 53 53 44 54 0a 0b 00 5b 20 43 53 54 31 48 43 31 5f 14 43 05 41 50 50 54 00 a0 4b 04 90 7b 43 46 47 44 0b 00 02 00 90 7b 43 46 47 44 01 00 92 7b 53 44 54 4c 0a 10 00 7d 53 44 54 4c 0a 10 53 44 54 4c 5b 80 49 53 54 31 00 83 88 53 53 44 54 0a 04 00 83 88 53 53 44 54 0a 05 00 5b 20 49 53 54 31 48 49 31 5f 10 44 0e 5c 2e 5f 50 52 5f 43 50 55 32 14 1f 5f 50 44 43 01 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 50 44 43 68 60 47 43 41 50 60 a4 60 14 22 5f 4f 53 43 04 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 4f 53 43 68 69 6a 6b 60 47 43 41 50 60 a4 60 14 44 09 47 43 41 50 01 8a 68 00 53 54 53 32 8a 68 0a 04 43 41 50 32 a0 12 91 93 53 54 53 32 0a 06 93 53 54 53 32 0a 0a a4 00 a0 16 7b 53 54 53 32 01 00 7b 43 41 50 32 0b ff 0b 43 41 50 32 a4 00 7d 7b 50 44 43 32 0c ff ff ff 7f 00 43 41 50 32 50 44 43 32 a0 1b 93 7b 50 44 43 32 0a 09 00 0a 09 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 50 54 a0 18 7b 50 44 43 32 0a 18 00 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 43 54 70 50 44 43 32 50 44 43 30 a4 00 10 44 0e 5c 2e 5f 50 52 5f 43 50 55 33 14 1f 5f 50 44 43 01 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 50 44 43 68 60 47 43 41 50 60 a4 60 14 22 5f 4f 53 43 04 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 4f 53 43 68 69 6a 6b 60 47 43 41 50 60 a4 60 14 44 09 47 43 41 50 01 8a 68 00 53 54 53 33 8a 68 0a 04 43 41 50 33 a0 12 91 93 53 54 53 33 0a 06 93 53 54 53 33 0a 0a a4 00 a0 16 7b 53 54 53 33 01 00 7b 43 41 50 33 0b ff 0b 43 41 50 33 a4 00 7d 7b 50 44 43 33 0c ff ff ff 7f 00 43 41 50 33 50 44 43 33 a0 1b 93 7b 50 44 43 33 0a 09 00 0a 09 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 50 54 a0 18 7b 50 44 43 33 0a 18 00 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 43 54 70 50 44 43 33 50 44 43 30 a4 00 10 44 0e 5c 2e 5f 50 52 5f 43 50 55 34 14 1f 5f 50 44 43 01 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 50 44 43 68 60 47 43 41 50 60 a4 60 14 22 5f 4f 53 43 04 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 4f 53 43 68 69 6a 6b 60 47 43 41 50 60 a4 60 14 44 09 47 43 41 50 01 8a 68 00 53 54 53 34 8a 68 0a 04 43 41 50 34 a0 12 91 93 53 54 53 34 0a 06 93 53 54 53 34 0a 0a a4 00 a0 16 7b 53 54 53 34 01 00 7b 43 41 50 34 0b ff 0b 43 41 50 34 a4 00 7d 7b 50 44 43 34 0c ff ff ff 7f 00 43 41 50 34 50 44 43 34 a0 1b 93 7b 50 44 43 34 0a 09 00 0a 09 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 50 54 a0 18 7b 50 44 43 34 0a 18 00 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 43 54 70 50 44 43 34 50 44 43 30 a4 00 10 44 0e 5c 2e 5f 50 52 5f 43 50 55 35 14 1f 5f 50 44 43 01 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 50 44 43 68 60 47 43 41 50 60 a4 60 14 22 5f 4f 53 43 04 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 4f 53 43 68 69 6a 6b 60 47 43 41 50 60 a4 60 14 44 09 47 43 41 50 01 8a 68 00 53 54 53 35 8a 68 0a 04 43 41 50 35 a0 12 91 93 53 54 53 35 0a 06 93 53 54 53 35 0a 0a a4 00 a0 16 7b 53 54 53 35 01 00 7b 43 41 50 35 0b ff 0b 43 41 50 35 a4 00 7d 7b 50 44 43 35 0c ff ff ff 7f 00 43 41 50 35 50 44 43 35 a0 1b 93 7b 50 44 43 35 0a 09 00 0a 09 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 50 54 a0 18 7b 50 44 43 35 0a 18 00 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 43 54 70 50 44 43 35 50 44 43 30 a4 00 10 44 0e 5c 2e 5f 50 52 5f 43 50 55 36 14 1f 5f 50 44 43 01 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 50 44 43 68 60 47 43 41 50 60 a4 60 14 22 5f 4f 53 43 04 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 4f 53 43 68 69 6a 6b 60 47 43 41 50 60 a4 60 14 44 09 47 43 41 50 01 8a 68 00 53 54 53 36 8a 68 0a 04 43 41 50 36 a0 12 91 93 53 54 53 36 0a 06 93 53 54 53 36 0a 0a a4 00 a0 16 7b 53 54 53 36 01 00 7b 43 41 50 36 0b ff 0b 43 41 50 36 a4 00 7d 7b 50 44 43 36 0c ff ff ff 7f 00 43 41 50 36 50 44 43 36 a0 1b 93 7b 50 44 43 36 0a 09 00 0a 09 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 50 54 a0 18 7b 50 44 43 36 0a 18 00 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 43 54 70 50 44 43 36 50 44 43 30 a4 00 10 44 0e 5c 2e 5f 50 52 5f 43 50 55 37 14 1f 5f 50 44 43 01 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 50 44 43 68 60 47 43 41 50 60 a4 60 14 22 5f 4f 53 43 04 70 5c 2f 03 5f 50 52 5f 43 50 55 30 43 4f 53 43 68 69 6a 6b 60 47 43 41 50 60 a4 60 14 44 09 47 43 41 50 01 8a 68 00 53 54 53 37 8a 68 0a 04 43 41 50 37 a0 12 91 93 53 54 53 37 0a 06 93 53 54 53 37 0a 0a a4 00 a0 16 7b 53 54 53 37 01 00 7b 43 41 50 37 0b ff 0b 43 41 50 37 a4 00 7d 7b 50 44 43 37 0c ff ff ff 7f 00 43 41 50 37 50 44 43 37 a0 1b 93 7b 50 44 43 37 0a 09 00 0a 09 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 50 54 a0 18 7b 50 44 43 37 0a 18 00 5c 2f 03 5f 50 52 5f 43 50 55 31 41 50 43 54 70 50 44 43 37 50 44 43 30 a4 00 } */ /* MCFG: Length=60, Revision=1, Checksum=110, OEMID=FTS, OEM Table ID=D3219-A1, OEM Revision=0x1072009, Creator ID=MSFT, Creator Revision=0x97 Base Address=0x00000000f8000000 Segment Group=0x0000 Start Bus=0 End Bus=63 */ /* HPET: Length=56, Revision=1, Checksum=123, OEMID=FTS, OEM Table ID=D3219-A1, OEM Revision=0x1072009, Creator ID=AMI., Creator Revision=0x5 HPET Number=0 ADDR=0x00000000fed00000:0[64] (Memory) HW Rev=0x1 Comparators=7 Counter Size=1 Legacy IRQ routing capable={TRUE} PCI Vendor ID=0x8086 Minimal Tick=14318 Flags=0x00 */ /* SSDT: Length=877, Revision=1, Checksum=62, OEMID=SataRe, OEM Table ID=SataTabl, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20120711 Data={ 53 53 44 54 6d 03 00 00 01 3e 53 61 74 61 52 65 53 61 74 61 54 61 62 6c 00 10 00 00 49 4e 54 4c 11 07 12 20 10 46 09 5c 00 08 53 54 46 45 11 0a 0a 07 10 06 00 00 00 00 ef 08 53 54 46 44 11 0a 0a 07 90 06 00 00 00 00 ef 08 46 5a 54 46 11 0a 0a 07 00 00 00 00 00 00 f5 08 44 43 46 4c 11 0a 0a 07 c1 00 00 00 00 00 b1 08 53 43 42 46 11 03 0a 15 08 43 4d 44 43 00 14 42 04 47 54 46 42 0a 77 43 4d 44 43 0a 38 60 5b 13 53 43 42 46 60 0a 38 43 4d 44 58 77 43 4d 44 43 0a 07 60 8c 53 43 42 46 72 60 01 00 41 30 30 31 70 68 43 4d 44 58 70 69 41 30 30 31 75 43 4d 44 43 10 41 2b 5c 2f 03 5f 53 42 5f 50 43 49 30 53 41 54 30 08 52 45 47 46 01 14 12 5f 52 45 47 02 a0 0b 93 68 0a 02 70 69 52 45 47 46 08 54 4d 44 30 11 03 0a 14 8a 54 4d 44 30 00 50 49 4f 30 8a 54 4d 44 30 0a 04 44 4d 41 30 8a 54 4d 44 30 0a 08 50 49 4f 31 8a 54 4d 44 30 0a 0c 44 4d 41 31 8a 54 4d 44 30 0a 10 43 48 4e 46 14 32 5f 47 54 4d 00 70 0a 78 50 49 4f 30 70 0a 14 44 4d 41 30 70 0a 78 50 49 4f 31 70 0a 14 44 4d 41 31 7d 43 48 4e 46 0a 05 43 48 4e 46 a4 54 4d 44 30 14 06 5f 53 54 4d 03 5b 82 44 05 53 50 54 30 08 5f 41 44 52 0b ff ff 14 45 04 5f 47 54 46 00 70 00 43 4d 44 43 a0 14 91 44 53 53 50 46 48 50 50 47 54 46 42 53 54 46 44 0a 06 a1 0b 47 54 46 42 53 54 46 45 0a 06 47 54 46 42 46 5a 54 46 00 47 54 46 42 44 43 46 4c 00 a4 53 43 42 46 5b 82 46 05 53 50 54 31 08 5f 41 44 52 0c ff ff 01 00 14 45 04 5f 47 54 46 00 70 00 43 4d 44 43 a0 14 91 44 53 53 50 46 48 50 50 47 54 46 42 53 54 46 44 0a 06 a1 0b 47 54 46 42 53 54 46 45 0a 06 47 54 46 42 46 5a 54 46 00 47 54 46 42 44 43 46 4c 00 a4 53 43 42 46 5b 82 46 05 53 50 54 32 08 5f 41 44 52 0c ff ff 02 00 14 45 04 5f 47 54 46 00 70 00 43 4d 44 43 a0 14 91 44 53 53 50 46 48 50 50 47 54 46 42 53 54 46 44 0a 06 a1 0b 47 54 46 42 53 54 46 45 0a 06 47 54 46 42 46 5a 54 46 00 47 54 46 42 44 43 46 4c 00 a4 53 43 42 46 5b 82 46 05 53 50 54 33 08 5f 41 44 52 0c ff ff 03 00 14 45 04 5f 47 54 46 00 70 00 43 4d 44 43 a0 14 91 44 53 53 50 46 48 50 50 47 54 46 42 53 54 46 44 0a 06 a1 0b 47 54 46 42 53 54 46 45 0a 06 47 54 46 42 46 5a 54 46 00 47 54 46 42 44 43 46 4c 00 a4 53 43 42 46 5b 82 46 05 53 50 54 34 08 5f 41 44 52 0c ff ff 04 00 14 45 04 5f 47 54 46 00 70 00 43 4d 44 43 a0 14 91 44 53 53 50 46 48 50 50 47 54 46 42 53 54 46 44 0a 06 a1 0b 47 54 46 42 53 54 46 45 0a 06 47 54 46 42 46 5a 54 46 00 47 54 46 42 44 43 46 4c 00 a4 53 43 42 46 5b 82 46 05 53 50 54 35 08 5f 41 44 52 0c ff ff 05 00 14 45 04 5f 47 54 46 00 70 00 43 4d 44 43 a0 14 91 44 53 53 50 46 48 50 50 47 54 46 42 53 54 46 44 0a 06 a1 0b 47 54 46 42 53 54 46 45 0a 06 47 54 46 42 46 5a 54 46 00 47 54 46 42 44 43 46 4c 00 a4 53 43 42 46 } */ /* SSDT: Length=13608, Revision=1, Checksum=78, OEMID=SaSsdt, OEM Table ID=SaSsdt, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20091112 Data={ 53 53 44 54 28 35 00 00 01 4e 53 61 53 73 64 74 53 61 53 73 64 74 20 00 00 30 00 00 49 4e 54 4c 12 11 09 20 5b 80 53 41 4e 56 00 0c 18 be 80 da 0b 6d 01 5b 81 4f 23 53 41 4e 56 10 53 41 52 56 20 41 53 4c 42 20 49 4d 4f 4e 08 49 47 44 53 08 43 41 44 4c 08 50 41 44 4c 08 43 53 54 45 10 4e 53 54 45 10 44 49 44 39 20 44 49 44 41 20 44 49 44 42 20 49 42 54 54 08 49 50 41 54 08 49 50 53 43 08 49 42 4c 43 08 49 42 49 41 08 49 53 53 43 08 49 50 43 46 08 49 44 4d 53 08 49 46 31 45 08 48 56 43 4f 08 4e 58 44 31 20 4e 58 44 32 20 4e 58 44 33 20 4e 58 44 34 20 4e 58 44 35 20 4e 58 44 36 20 4e 58 44 37 20 4e 58 44 38 20 47 53 4d 49 08 50 41 56 50 08 4c 49 44 53 08 4b 53 56 30 20 4b 53 56 31 08 42 42 41 52 20 42 4c 43 53 08 42 52 54 4c 08 41 4c 53 45 08 41 4c 41 46 08 4c 4c 4f 57 08 4c 48 49 48 08 41 4c 46 50 08 41 55 44 41 20 41 55 44 42 20 41 55 44 43 20 44 49 44 43 20 44 49 44 44 20 44 49 44 45 20 44 49 44 46 20 43 43 53 41 20 43 43 4e 54 20 00 48 25 53 47 4d 44 08 53 47 46 4c 08 50 57 4f 4b 08 48 4c 52 53 08 50 57 45 4e 08 50 52 53 54 08 43 50 53 50 20 45 45 43 50 08 45 56 43 50 10 58 42 41 53 20 47 42 41 53 10 53 47 47 50 08 4e 56 47 41 20 4e 56 48 41 20 41 4d 44 41 20 4e 44 49 44 08 44 49 44 31 20 44 49 44 32 20 44 49 44 33 20 44 49 44 34 20 44 49 44 35 20 44 49 44 36 20 44 49 44 37 20 44 49 44 38 20 4f 42 53 31 20 4f 42 53 32 20 4f 42 53 33 20 4f 42 53 34 20 4f 42 53 35 20 4f 42 53 36 20 4f 42 53 37 20 4f 42 53 38 20 4c 54 52 41 08 4f 42 46 41 08 4c 54 52 42 08 4f 42 46 42 08 4c 54 52 43 08 4f 42 46 43 08 53 4d 53 4c 10 53 4e 53 4c 10 50 30 55 42 08 50 31 55 42 08 50 32 55 42 08 45 44 50 56 08 4e 58 44 58 20 44 49 44 58 20 50 43 53 4c 08 53 43 37 41 08 44 53 45 4c 08 45 53 45 4c 08 50 53 45 4c 08 4d 58 44 31 20 4d 58 44 32 20 4d 58 44 33 20 4d 58 44 34 20 4d 58 44 35 20 4d 58 44 36 20 4d 58 44 37 20 4d 58 44 38 20 50 58 46 44 08 45 42 41 53 20 48 59 53 53 20 10 83 2b 03 5c 2e 5f 53 42 5f 50 43 49 30 08 4c 54 52 53 00 08 4f 42 46 53 00 5b 82 4c 21 50 45 47 30 08 5f 41 44 52 0c 00 00 01 00 5b 80 50 45 47 52 02 0a c0 0a 30 5b 81 1c 50 45 47 52 03 00 10 50 53 54 53 01 00 4f 14 47 45 4e 47 01 00 01 50 4d 45 47 01 14 0f 5f 50 52 57 00 a4 47 50 52 57 0a 09 0a 04 14 23 5f 50 53 57 01 a0 0e 68 70 01 47 45 4e 47 70 01 50 4d 45 47 a1 0d 70 00 47 45 4e 47 70 00 50 4d 45 47 14 0c 48 50 4d 45 08 70 01 50 53 54 53 14 16 5f 50 52 54 00 a0 0a 50 49 43 4d a4 41 52 30 32 a4 50 52 30 32 14 18 5f 49 4e 49 00 70 4c 54 52 41 4c 54 52 53 70 4f 42 46 41 4f 42 46 53 08 4c 54 52 56 12 06 04 00 00 00 00 08 4f 50 54 53 00 14 42 14 5f 44 53 4d 0c 08 5f 54 5f 31 00 08 5f 54 5f 30 00 a2 49 12 01 70 99 68 00 5f 54 5f 30 a0 4c 11 93 5f 54 5f 30 11 13 0a 10 d0 37 c9 e5 53 35 7a 4d 91 17 ea 4d 19 c3 43 4d a2 40 10 01 70 99 6a 00 5f 54 5f 31 a0 3e 93 5f 54 5f 31 00 a0 32 93 69 0a 02 70 01 4f 50 54 53 a0 10 4c 54 52 53 7d 4f 50 54 53 0a 40 4f 50 54 53 a0 10 4f 42 46 53 7d 4f 50 54 53 0a 10 4f 50 54 53 a4 4f 50 54 53 a1 03 a4 00 a1 44 0b a0 41 04 93 5f 54 5f 31 0a 04 a0 37 93 69 0a 02 a0 1a 4f 42 46 53 a4 11 13 0a 10 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 a1 16 a4 11 13 0a 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a1 4f 06 a0 4c 06 93 5f 54 5f 31 0a 06 a0 42 06 93 69 0a 02 a0 47 05 4c 54 52 53 70 7b 7a 53 4d 53 4c 0a 0a 00 0a 07 00 88 4c 54 52 56 00 00 70 7b 53 4d 53 4c 0b ff 03 00 88 4c 54 52 56 01 00 70 7b 7a 53 4e 53 4c 0a 0a 00 0a 07 00 88 4c 54 52 56 0a 02 00 70 7b 53 4e 53 4c 0b ff 03 00 88 4c 54 52 56 0a 03 00 a4 4c 54 52 56 a1 03 a4 00 a5 a5 a4 11 03 01 00 5b 82 1b 50 45 47 50 08 5f 41 44 52 00 14 0f 5f 50 52 57 00 a4 47 50 52 57 0a 09 0a 04 5b 82 4f 1f 50 45 47 31 08 5f 41 44 52 0c 01 00 01 00 5b 80 50 45 47 52 02 0a c0 0a 30 5b 81 1c 50 45 47 52 03 00 10 50 53 54 53 01 00 4f 14 47 45 4e 47 01 00 01 50 4d 45 47 01 14 0f 5f 50 52 57 00 a4 47 50 52 57 0a 09 0a 04 14 23 5f 50 53 57 01 a0 0e 68 70 01 47 45 4e 47 70 01 50 4d 45 47 a1 0d 70 00 47 45 4e 47 70 00 50 4d 45 47 14 0c 48 50 4d 45 08 70 01 50 53 54 53 14 16 5f 50 52 54 00 a0 0a 50 49 43 4d a4 41 52 30 41 a4 50 52 30 41 14 18 5f 49 4e 49 00 70 4c 54 52 42 4c 54 52 53 70 4f 42 46 42 4f 42 46 53 08 4c 54 52 56 12 06 04 00 00 00 00 08 4f 50 54 53 00 14 42 14 5f 44 53 4d 0c 08 5f 54 5f 31 00 08 5f 54 5f 30 00 a2 49 12 01 70 99 68 00 5f 54 5f 30 a0 4c 11 93 5f 54 5f 30 11 13 0a 10 d0 37 c9 e5 53 35 7a 4d 91 17 ea 4d 19 c3 43 4d a2 40 10 01 70 99 6a 00 5f 54 5f 31 a0 3e 93 5f 54 5f 31 00 a0 32 93 69 0a 02 70 01 4f 50 54 53 a0 10 4c 54 52 53 7d 4f 50 54 53 0a 40 4f 50 54 53 a0 10 4f 42 46 53 7d 4f 50 54 53 0a 10 4f 50 54 53 a4 4f 50 54 53 a1 03 a4 00 a1 44 0b a0 41 04 93 5f 54 5f 31 0a 04 a0 37 93 69 0a 02 a0 1a 4f 42 46 53 a4 11 13 0a 10 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 a1 16 a4 11 13 0a 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a1 4f 06 a0 4c 06 93 5f 54 5f 31 0a 06 a0 42 06 93 69 0a 02 a0 47 05 4c 54 52 53 70 7b 7a 53 4d 53 4c 0a 0a 00 0a 07 00 88 4c 54 52 56 00 00 70 7b 53 4d 53 4c 0b ff 03 00 88 4c 54 52 56 01 00 70 7b 7a 53 4e 53 4c 0a 0a 00 0a 07 00 88 4c 54 52 56 0a 02 00 70 7b 53 4e 53 4c 0b ff 03 00 88 4c 54 52 56 0a 03 00 a4 4c 54 52 56 a1 03 a4 00 a5 a5 a4 11 03 01 00 5b 82 4f 1f 50 45 47 32 08 5f 41 44 52 0c 02 00 01 00 5b 80 50 45 47 52 02 0a c0 0a 30 5b 81 1c 50 45 47 52 03 00 10 50 53 54 53 01 00 4f 14 47 45 4e 47 01 00 01 50 4d 45 47 01 14 0f 5f 50 52 57 00 a4 47 50 52 57 0a 09 0a 04 14 23 5f 50 53 57 01 a0 0e 68 70 01 47 45 4e 47 70 01 50 4d 45 47 a1 0d 70 00 47 45 4e 47 70 00 50 4d 45 47 14 0c 48 50 4d 45 08 70 01 50 53 54 53 14 16 5f 50 52 54 00 a0 0a 50 49 43 4d a4 41 52 30 42 a4 50 52 30 42 14 18 5f 49 4e 49 00 70 4c 54 52 43 4c 54 52 53 70 4f 42 46 43 4f 42 46 53 08 4c 54 52 56 12 06 04 00 00 00 00 08 4f 50 54 53 00 14 42 14 5f 44 53 4d 0c 08 5f 54 5f 31 00 08 5f 54 5f 30 00 a2 49 12 01 70 99 68 00 5f 54 5f 30 a0 4c 11 93 5f 54 5f 30 11 13 0a 10 d0 37 c9 e5 53 35 7a 4d 91 17 ea 4d 19 c3 43 4d a2 40 10 01 70 99 6a 00 5f 54 5f 31 a0 3e 93 5f 54 5f 31 00 a0 32 93 69 0a 02 70 01 4f 50 54 53 a0 10 4c 54 52 53 7d 4f 50 54 53 0a 40 4f 50 54 53 a0 10 4f 42 46 53 7d 4f 50 54 53 0a 10 4f 50 54 53 a4 4f 50 54 53 a1 03 a4 00 a1 44 0b a0 41 04 93 5f 54 5f 31 0a 04 a0 37 93 69 0a 02 a0 1a 4f 42 46 53 a4 11 13 0a 10 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 00 a1 16 a4 11 13 0a 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a1 4f 06 a0 4c 06 93 5f 54 5f 31 0a 06 a0 42 06 93 69 0a 02 a0 47 05 4c 54 52 53 70 7b 7a 53 4d 53 4c 0a 0a 00 0a 07 00 88 4c 54 52 56 00 00 70 7b 53 4d 53 4c 0b ff 03 00 88 4c 54 52 56 01 00 70 7b 7a 53 4e 53 4c 0a 0a 00 0a 07 00 88 4c 54 52 56 0a 02 00 70 7b 53 4e 53 4c 0b ff 03 00 88 4c 54 52 56 0a 03 00 a4 4c 54 52 56 a1 03 a4 00 a5 a5 a4 11 03 01 00 5b 82 40 53 42 30 44 33 08 5f 41 44 52 0c 00 00 03 00 08 42 41 52 41 0c 00 00 00 80 08 54 42 41 52 00 08 54 43 4d 44 00 08 4d 4f 44 42 00 08 4d 4f 44 43 00 14 16 5f 53 54 41 00 a0 0d 92 93 41 55 56 44 0b ff ff a4 0a 0f a4 00 14 32 5f 49 4e 49 00 a0 2b 90 92 93 7b 41 42 41 52 0c 04 c0 ff ff 00 0c 04 c0 ff ff 92 93 7b 41 42 41 52 0c 00 c0 ff ff 00 00 70 41 42 41 52 42 41 52 41 5b 80 52 50 43 53 00 5c 58 42 41 53 0c 40 80 01 00 5b 81 17 52 50 43 53 00 00 80 02 c0 41 43 4d 44 08 00 48 05 41 42 41 52 20 5b 80 52 50 43 5a 02 00 0a 40 5b 81 0b 52 50 43 5a 13 41 55 56 44 10 14 4a 08 41 53 54 52 08 a0 42 08 90 92 93 7b 41 42 41 52 0c 04 c0 ff ff 00 0c 04 c0 ff ff 92 93 7b 41 42 41 52 0c 00 c0 ff ff 00 00 7b 41 42 41 52 0c f0 ff ff ff 42 42 41 52 72 42 42 41 52 0b 00 10 42 42 41 52 5b 80 52 50 43 59 00 42 42 41 52 0a 25 5b 81 1b 52 50 43 59 03 00 40 06 45 4d 34 57 20 45 4d 57 41 20 00 40 04 41 44 57 41 20 70 41 55 44 41 45 4d 57 41 70 41 55 44 42 41 44 57 41 70 41 55 44 43 45 4d 34 57 14 4d 0f 56 53 54 52 09 08 43 4f 4e 54 0b e8 03 08 41 44 44 52 0c 00 00 00 80 70 68 41 44 44 52 5b 80 43 43 44 43 00 41 44 44 52 0a 04 5b 81 0b 43 43 44 43 01 43 44 45 43 20 a0 43 0c 90 92 93 7b 41 42 41 52 0c 04 c0 ff ff 00 0c 04 c0 ff ff 92 93 7b 41 42 41 52 0c 00 c0 ff ff 00 00 a0 4f 09 92 93 43 44 45 43 00 7b 41 42 41 52 0c f0 ff ff ff 42 42 41 52 5b 80 49 50 43 56 00 42 42 41 52 0a 70 5b 81 15 49 50 43 56 03 00 40 30 41 56 49 43 20 00 20 41 49 52 53 10 70 0b e8 03 43 4f 4e 54 a2 1a 90 93 7b 41 49 52 53 01 00 01 92 93 43 4f 4e 54 00 5b 21 01 76 43 4f 4e 54 7d 41 49 52 53 0a 02 41 49 52 53 70 43 44 45 43 41 56 49 43 7d 41 49 52 53 01 41 49 52 53 70 0b e8 03 43 4f 4e 54 a2 1a 90 93 7b 41 49 52 53 01 00 01 92 93 43 4f 4e 54 00 5b 21 01 76 43 4f 4e 54 14 44 05 43 58 44 43 08 08 49 44 44 58 0c 00 00 00 80 a0 42 04 90 92 93 43 43 53 41 00 92 93 43 43 4e 54 00 70 43 43 53 41 49 44 44 58 a2 27 95 49 44 44 58 72 43 43 53 41 77 43 43 4e 54 0a 04 00 00 56 53 54 52 49 44 44 58 72 49 44 44 58 0a 04 49 44 44 58 14 4c 0b 41 52 53 54 08 a0 44 0b 90 92 93 7b 41 42 41 52 0c 04 c0 ff ff 00 0c 04 c0 ff ff 92 93 7b 41 42 41 52 0c 00 c0 ff ff 00 00 7b 41 42 41 52 0c f0 ff ff ff 42 42 41 52 5b 80 49 50 43 56 00 42 42 41 52 0a bf 5b 81 2e 49 50 43 56 00 00 40 04 43 52 53 54 20 00 40 20 43 4f 52 42 20 00 40 06 52 49 52 42 20 00 40 10 4f 53 44 31 20 00 40 0e 4f 53 44 32 20 7b 43 4f 52 42 0c fd ff ff ff 43 4f 52 42 7b 52 49 52 42 0c fd ff ff ff 52 49 52 42 7b 4f 53 44 31 0c fd ff ff ff 4f 53 44 31 7b 4f 53 44 32 0c fd ff ff ff 4f 53 44 32 7b 43 52 53 54 0c fe ff ff ff 43 52 53 54 14 4a 11 41 49 4e 49 08 08 43 4f 4e 54 0b e8 03 a0 4a 10 90 92 93 7b 41 42 41 52 0c 04 c0 ff ff 00 0c 04 c0 ff ff 92 93 7b 41 42 41 52 0c 00 c0 ff ff 00 00 7b 41 42 41 52 0c f0 ff ff ff 42 42 41 52 5b 80 49 50 43 56 00 42 42 41 52 0a 70 5b 81 28 49 50 43 56 03 47 43 41 50 10 00 30 47 43 54 4c 20 00 10 53 53 54 53 08 00 48 28 41 56 49 43 20 00 20 41 49 52 53 10 7d 47 43 54 4c 01 47 43 54 4c 70 0b e8 03 43 4f 4e 54 a2 1a 90 93 7b 47 43 54 4c 01 00 00 92 93 43 4f 4e 54 00 5b 21 01 76 43 4f 4e 54 7b 47 43 41 50 0b ff ff 47 43 41 50 7d 53 53 54 53 0a 0f 53 53 54 53 7b 47 43 54 4c 0c fe ff ff ff 47 43 54 4c 70 0b e8 03 43 4f 4e 54 a2 1a 90 93 7b 47 43 54 4c 01 00 01 92 93 43 4f 4e 54 00 5b 21 01 76 43 4f 4e 54 7d 47 43 54 4c 01 47 43 54 4c 70 0b e8 03 43 4f 4e 54 a2 1a 90 93 7b 47 43 54 4c 01 00 00 92 93 43 4f 4e 54 00 5b 21 01 76 43 4f 4e 54 14 4c 0b 41 42 57 41 09 a0 40 08 68 a0 46 05 91 93 7b 41 42 41 52 0c 04 c0 ff ff 00 0c 04 c0 ff ff 93 7b 41 42 41 52 0c 00 c0 ff ff 00 00 a0 34 92 93 42 41 52 41 0c 00 00 00 80 70 41 42 41 52 54 42 41 52 70 41 43 4d 44 54 43 4d 44 70 42 41 52 41 41 42 41 52 70 0a 06 41 43 4d 44 70 01 4d 4f 44 42 a1 25 a0 23 92 93 7b 41 43 4d 44 0a 06 00 0a 06 70 41 43 4d 44 54 43 4d 44 70 0a 06 41 43 4d 44 70 01 4d 4f 44 43 a1 33 a0 22 4d 4f 44 42 a0 1c 93 41 42 41 52 42 41 52 41 70 54 42 41 52 41 42 41 52 70 54 43 4d 44 41 43 4d 44 a0 0e 4d 4f 44 43 70 54 43 4d 44 41 43 4d 44 5b 82 86 74 02 47 46 58 30 08 5f 41 44 52 0c 00 00 02 00 14 47 05 5f 44 45 50 00 41 44 42 47 0d 47 46 58 30 20 44 45 50 20 43 61 6c 6c 00 a0 23 93 53 30 49 44 01 41 44 42 47 0d 47 46 58 30 20 44 45 50 00 a4 12 0c 01 5c 2e 5f 53 42 5f 50 45 50 44 a1 18 41 44 42 47 0d 47 46 58 30 20 44 45 50 20 4e 55 4c 4c 00 a4 12 02 00 14 26 5f 44 4f 53 01 70 7b 68 0a 07 00 44 53 45 4e a0 15 93 7b 68 0a 03 00 00 a0 0c 5b 12 48 44 4f 53 00 48 44 4f 53 14 4f c7 5f 44 4f 44 00 a0 0c 5b 12 49 44 41 42 00 49 44 41 42 a1 42 15 70 00 4e 44 49 44 a0 15 92 93 44 49 44 4c 00 70 53 44 44 4c 44 49 44 4c 44 49 44 31 a0 15 92 93 44 44 4c 32 00 70 53 44 44 4c 44 44 4c 32 44 49 44 32 a0 15 92 93 44 44 4c 33 00 70 53 44 44 4c 44 44 4c 33 44 49 44 33 a0 15 92 93 44 44 4c 34 00 70 53 44 44 4c 44 44 4c 34 44 49 44 34 a0 15 92 93 44 44 4c 35 00 70 53 44 44 4c 44 44 4c 35 44 49 44 35 a0 15 92 93 44 44 4c 36 00 70 53 44 44 4c 44 44 4c 36 44 49 44 36 a0 15 92 93 44 44 4c 37 00 70 53 44 44 4c 44 44 4c 37 44 49 44 37 a0 15 92 93 44 44 4c 38 00 70 53 44 44 4c 44 44 4c 38 44 49 44 38 a0 15 92 93 44 44 4c 39 00 70 53 44 44 4c 44 44 4c 39 44 49 44 39 a0 15 92 93 44 44 31 30 00 70 53 44 44 4c 44 44 31 30 44 49 44 41 a0 15 92 93 44 44 31 31 00 70 53 44 44 4c 44 44 31 31 44 49 44 42 a0 15 92 93 44 44 31 32 00 70 53 44 44 4c 44 44 31 32 44 49 44 43 a0 15 92 93 44 44 31 33 00 70 53 44 44 4c 44 44 31 33 44 49 44 44 a0 15 92 93 44 44 31 34 00 70 53 44 44 4c 44 44 31 34 44 49 44 45 a0 15 92 93 44 44 31 35 00 70 53 44 44 4c 44 44 31 35 44 49 44 46 a0 28 93 4e 44 49 44 01 08 54 4d 50 31 12 03 01 ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 31 00 00 a4 54 4d 50 31 a0 3d 93 4e 44 49 44 0a 02 08 54 4d 50 32 12 04 02 ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 32 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 32 01 00 a4 54 4d 50 32 a0 43 05 93 4e 44 49 44 0a 03 08 54 4d 50 33 12 05 03 ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 33 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 33 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 33 0a 02 00 a4 54 4d 50 33 a0 48 06 93 4e 44 49 44 0a 04 08 54 4d 50 34 12 06 04 ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 34 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 34 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 34 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 34 0a 03 00 a4 54 4d 50 34 a0 4d 07 93 4e 44 49 44 0a 05 08 54 4d 50 35 12 07 05 ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 35 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 35 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 35 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 35 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 35 0a 04 00 a4 54 4d 50 35 a0 42 09 93 4e 44 49 44 0a 06 08 54 4d 50 36 12 08 06 ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 36 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 36 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 36 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 36 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 36 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 36 0a 05 00 a4 54 4d 50 36 a0 47 0a 93 4e 44 49 44 0a 07 08 54 4d 50 37 12 09 07 ff ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 37 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 37 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 37 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 37 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 37 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 37 0a 05 00 70 7d 0c 00 00 01 00 44 49 44 37 00 88 54 4d 50 37 0a 06 00 a4 54 4d 50 37 a0 4c 0b 93 4e 44 49 44 0a 08 08 54 4d 50 38 12 0a 08 ff ff ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 38 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 38 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 38 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 38 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 38 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 38 0a 05 00 70 7d 0c 00 00 01 00 44 49 44 37 00 88 54 4d 50 38 0a 06 00 70 7d 0c 00 00 01 00 44 49 44 38 00 88 54 4d 50 38 0a 07 00 a4 54 4d 50 38 a0 41 0d 93 4e 44 49 44 0a 09 08 54 4d 50 39 12 0b 09 ff ff ff ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 39 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 39 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 39 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 39 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 39 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 39 0a 05 00 70 7d 0c 00 00 01 00 44 49 44 37 00 88 54 4d 50 39 0a 06 00 70 7d 0c 00 00 01 00 44 49 44 38 00 88 54 4d 50 39 0a 07 00 70 7d 0c 00 00 01 00 44 49 44 39 00 88 54 4d 50 39 0a 08 00 a4 54 4d 50 39 a0 46 0e 93 4e 44 49 44 0a 0a 08 54 4d 50 41 12 0c 0a ff ff ff ff ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 41 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 41 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 41 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 41 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 41 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 41 0a 05 00 70 7d 0c 00 00 01 00 44 49 44 37 00 88 54 4d 50 41 0a 06 00 70 7d 0c 00 00 01 00 44 49 44 38 00 88 54 4d 50 41 0a 07 00 70 7d 0c 00 00 01 00 44 49 44 39 00 88 54 4d 50 41 0a 08 00 70 7d 0c 00 00 01 00 44 49 44 41 00 88 54 4d 50 41 0a 09 00 a4 54 4d 50 41 a0 4b 0f 93 4e 44 49 44 0a 0b 08 54 4d 50 42 12 0d 0b ff ff ff ff ff ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 42 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 42 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 42 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 42 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 42 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 42 0a 05 00 70 7d 0c 00 00 01 00 44 49 44 37 00 88 54 4d 50 42 0a 06 00 70 7d 0c 00 00 01 00 44 49 44 38 00 88 54 4d 50 42 0a 07 00 70 7d 0c 00 00 01 00 44 49 44 39 00 88 54 4d 50 42 0a 08 00 70 7d 0c 00 00 01 00 44 49 44 41 00 88 54 4d 50 42 0a 09 00 70 7d 0c 00 00 01 00 44 49 44 42 00 88 54 4d 50 42 0a 0a 00 a4 54 4d 50 42 a0 40 11 93 4e 44 49 44 0a 0c 08 54 4d 50 43 12 0e 0c ff ff ff ff ff ff ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 43 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 43 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 43 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 43 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 43 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 43 0a 05 00 70 7d 0c 00 00 01 00 44 49 44 37 00 88 54 4d 50 43 0a 06 00 70 7d 0c 00 00 01 00 44 49 44 38 00 88 54 4d 50 43 0a 07 00 70 7d 0c 00 00 01 00 44 49 44 39 00 88 54 4d 50 43 0a 08 00 70 7d 0c 00 00 01 00 44 49 44 41 00 88 54 4d 50 43 0a 09 00 70 7d 0c 00 00 01 00 44 49 44 42 00 88 54 4d 50 43 0a 0a 00 70 7d 0c 00 00 01 00 44 49 44 43 00 88 54 4d 50 43 0a 0b 00 a4 54 4d 50 43 a0 45 12 93 4e 44 49 44 0a 0d 08 54 4d 50 44 12 0f 0d ff ff ff ff ff ff ff ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 44 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 44 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 44 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 44 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 44 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 44 0a 05 00 70 7d 0c 00 00 01 00 44 49 44 37 00 88 54 4d 50 44 0a 06 00 70 7d 0c 00 00 01 00 44 49 44 38 00 88 54 4d 50 44 0a 07 00 70 7d 0c 00 00 01 00 44 49 44 39 00 88 54 4d 50 44 0a 08 00 70 7d 0c 00 00 01 00 44 49 44 41 00 88 54 4d 50 44 0a 09 00 70 7d 0c 00 00 01 00 44 49 44 42 00 88 54 4d 50 44 0a 0a 00 70 7d 0c 00 00 01 00 44 49 44 43 00 88 54 4d 50 44 0a 0b 00 70 7d 0c 00 00 01 00 44 49 44 44 00 88 54 4d 50 44 0a 0c 00 a4 54 4d 50 44 a0 4a 13 93 4e 44 49 44 0a 0e 08 54 4d 50 45 12 10 0e ff ff ff ff ff ff ff ff ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 45 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 45 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 45 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 45 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 45 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 45 0a 05 00 70 7d 0c 00 00 01 00 44 49 44 37 00 88 54 4d 50 45 0a 06 00 70 7d 0c 00 00 01 00 44 49 44 38 00 88 54 4d 50 45 0a 07 00 70 7d 0c 00 00 01 00 44 49 44 39 00 88 54 4d 50 45 0a 08 00 70 7d 0c 00 00 01 00 44 49 44 41 00 88 54 4d 50 45 0a 09 00 70 7d 0c 00 00 01 00 44 49 44 42 00 88 54 4d 50 45 0a 0a 00 70 7d 0c 00 00 01 00 44 49 44 43 00 88 54 4d 50 45 0a 0b 00 70 7d 0c 00 00 01 00 44 49 44 44 00 88 54 4d 50 45 0a 0c 00 70 7d 0c 00 00 01 00 44 49 44 45 00 88 54 4d 50 45 0a 0d 00 a4 54 4d 50 45 a0 4f 14 93 4e 44 49 44 0a 0f 08 54 4d 50 46 12 11 0f ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 70 7d 0c 00 00 01 00 44 49 44 31 00 88 54 4d 50 46 00 00 70 7d 0c 00 00 01 00 44 49 44 32 00 88 54 4d 50 46 01 00 70 7d 0c 00 00 01 00 44 49 44 33 00 88 54 4d 50 46 0a 02 00 70 7d 0c 00 00 01 00 44 49 44 34 00 88 54 4d 50 46 0a 03 00 70 7d 0c 00 00 01 00 44 49 44 35 00 88 54 4d 50 46 0a 04 00 70 7d 0c 00 00 01 00 44 49 44 36 00 88 54 4d 50 46 0a 05 00 70 7d 0c 00 00 01 00 44 49 44 37 00 88 54 4d 50 46 0a 06 00 70 7d 0c 00 00 01 00 44 49 44 38 00 88 54 4d 50 46 0a 07 00 70 7d 0c 00 00 01 00 44 49 44 39 00 88 54 4d 50 46 0a 08 00 70 7d 0c 00 00 01 00 44 49 44 41 00 88 54 4d 50 46 0a 09 00 70 7d 0c 00 00 01 00 44 49 44 42 00 88 54 4d 50 46 0a 0a 00 70 7d 0c 00 00 01 00 44 49 44 43 00 88 54 4d 50 46 0a 0b 00 70 7d 0c 00 00 01 00 44 49 44 44 00 88 54 4d 50 46 0a 0c 00 70 7d 0c 00 00 01 00 44 49 44 45 00 88 54 4d 50 46 0a 0d 00 70 7d 0c 00 00 01 00 44 49 44 46 00 88 54 4d 50 46 0a 0e 00 a4 54 4d 50 46 a4 12 05 01 0b 00 04 5b 82 46 0a 44 44 30 31 14 46 04 5f 41 44 52 08 a0 28 93 7b 0b 00 0f 44 49 44 31 00 0b 00 04 70 01 45 44 50 56 70 4e 58 44 31 4e 58 44 58 70 44 49 44 31 44 49 44 58 a4 01 a0 09 93 44 49 44 31 00 a4 01 a1 0b a4 7b 0b ff ff 44 49 44 31 00 14 0f 5f 44 43 53 00 a4 43 44 44 53 44 49 44 31 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 31 a4 4e 44 44 53 44 49 44 31 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 43 0b 44 44 30 32 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 32 00 0b 00 04 70 0a 02 45 44 50 56 70 4e 58 44 32 4e 58 44 58 70 44 49 44 32 44 49 44 58 a4 0a 02 a0 0a 93 44 49 44 32 00 a4 0a 02 a1 0b a4 7b 0b ff ff 44 49 44 32 00 14 19 5f 44 43 53 00 a0 09 93 4c 49 44 53 00 a4 00 a4 43 44 44 53 44 49 44 32 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 32 a4 4e 44 44 53 44 49 44 32 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 33 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 33 00 0b 00 04 70 0a 03 45 44 50 56 70 4e 58 44 33 4e 58 44 58 70 44 49 44 33 44 49 44 58 a4 0a 03 a0 0a 93 44 49 44 33 00 a4 0a 03 a1 0b a4 7b 0b ff ff 44 49 44 33 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 33 00 a4 0a 0b a1 0a a4 43 44 44 53 44 49 44 33 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 33 a4 4e 44 44 53 44 49 44 33 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 34 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 34 00 0b 00 04 70 0a 04 45 44 50 56 70 4e 58 44 34 4e 58 44 58 70 44 49 44 34 44 49 44 58 a4 0a 04 a0 0a 93 44 49 44 34 00 a4 0a 04 a1 0b a4 7b 0b ff ff 44 49 44 34 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 34 00 a4 0a 0b a1 0a a4 43 44 44 53 44 49 44 34 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 34 a4 4e 44 44 53 44 49 44 34 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 35 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 35 00 0b 00 04 70 0a 05 45 44 50 56 70 4e 58 44 35 4e 58 44 58 70 44 49 44 35 44 49 44 58 a4 0a 05 a0 0a 93 44 49 44 35 00 a4 0a 05 a1 0b a4 7b 0b ff ff 44 49 44 35 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 35 00 a4 0a 0b a1 0a a4 43 44 44 53 44 49 44 35 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 35 a4 4e 44 44 53 44 49 44 35 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 36 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 36 00 0b 00 04 70 0a 06 45 44 50 56 70 4e 58 44 36 4e 58 44 58 70 44 49 44 36 44 49 44 58 a4 0a 06 a0 0a 93 44 49 44 36 00 a4 0a 06 a1 0b a4 7b 0b ff ff 44 49 44 36 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 36 00 a4 0a 0b a1 0a a4 43 44 44 53 44 49 44 36 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 36 a4 4e 44 44 53 44 49 44 36 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 37 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 37 00 0b 00 04 70 0a 07 45 44 50 56 70 4e 58 44 37 4e 58 44 58 70 44 49 44 37 44 49 44 58 a4 0a 07 a0 0a 93 44 49 44 37 00 a4 0a 07 a1 0b a4 7b 0b ff ff 44 49 44 37 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 37 00 a4 0a 0b a1 0a a4 43 44 44 53 44 49 44 37 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 37 a4 4e 44 44 53 44 49 44 37 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 38 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 38 00 0b 00 04 70 0a 08 45 44 50 56 70 4e 58 44 38 4e 58 44 58 70 44 49 44 38 44 49 44 58 a4 0a 08 a0 0a 93 44 49 44 38 00 a4 0a 08 a1 0b a4 7b 0b ff ff 44 49 44 38 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 38 00 a4 0a 0b a1 0a a4 43 44 44 53 44 49 44 38 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 38 a4 4e 44 44 53 44 49 44 38 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 39 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 39 00 0b 00 04 70 0a 09 45 44 50 56 70 4e 58 44 38 4e 58 44 58 70 44 49 44 39 44 49 44 58 a4 0a 09 a0 0a 93 44 49 44 39 00 a4 0a 09 a1 0b a4 7b 0b ff ff 44 49 44 39 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 39 00 a4 0a 0b a1 0a a4 43 44 44 53 44 49 44 39 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 38 a4 4e 44 44 53 44 49 44 39 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 41 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 41 00 0b 00 04 70 0a 0a 45 44 50 56 70 4e 58 44 38 4e 58 44 58 70 44 49 44 41 44 49 44 58 a4 0a 0a a0 0a 93 44 49 44 41 00 a4 0a 0a a1 0b a4 7b 0b ff ff 44 49 44 41 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 41 00 a4 0a 0b a1 0a a4 43 44 44 53 44 49 44 41 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 38 a4 4e 44 44 53 44 49 44 41 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 42 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 42 00 0b 00 04 70 0a 0b 45 44 50 56 70 4e 58 44 38 4e 58 44 58 70 44 49 44 42 44 49 44 58 a4 0a 0b a0 0a 93 44 49 44 42 00 a4 0a 0b a1 0b a4 7b 0b ff ff 44 49 44 42 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 42 00 a4 0a 0b a1 0a a4 43 44 44 53 44 49 44 42 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 38 a4 4e 44 44 53 44 49 44 42 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 43 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 43 00 0b 00 04 70 0a 0c 45 44 50 56 70 4e 58 44 38 4e 58 44 58 70 44 49 44 43 44 49 44 58 a4 0a 0c a0 0a 93 44 49 44 43 00 a4 0a 0c a1 0b a4 7b 0b ff ff 44 49 44 43 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 43 00 a4 0a 0c a1 0a a4 43 44 44 53 44 49 44 43 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 38 a4 4e 44 44 53 44 49 44 43 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 44 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 44 00 0b 00 04 70 0a 0d 45 44 50 56 70 4e 58 44 38 4e 58 44 58 70 44 49 44 44 44 49 44 58 a4 0a 0d a0 0a 93 44 49 44 44 00 a4 0a 0d a1 0b a4 7b 0b ff ff 44 49 44 44 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 44 00 a4 0a 0d a1 0a a4 43 44 44 53 44 49 44 44 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 38 a4 4e 44 44 53 44 49 44 44 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 45 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 45 00 0b 00 04 70 0a 0e 45 44 50 56 70 4e 58 44 38 4e 58 44 58 70 44 49 44 45 44 49 44 58 a4 0a 0e a0 0a 93 44 49 44 45 00 a4 0a 0e a1 0b a4 7b 0b ff ff 44 49 44 45 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 45 00 a4 0a 0e a1 0a a4 43 44 44 53 44 49 44 45 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 38 a4 4e 44 44 53 44 49 44 45 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 46 0b 44 44 30 46 14 49 04 5f 41 44 52 08 a0 2a 93 7b 0b 00 0f 44 49 44 46 00 0b 00 04 70 0a 0f 45 44 50 56 70 4e 58 44 38 4e 58 44 58 70 44 49 44 46 44 49 44 58 a4 0a 0f a0 0a 93 44 49 44 46 00 a4 0a 0f a1 0b a4 7b 0b ff ff 44 49 44 46 00 14 1c 5f 44 43 53 00 a0 0a 93 44 49 44 43 00 a4 0a 0f a1 0a a4 43 44 44 53 44 49 44 46 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 38 a4 4e 44 44 53 44 49 44 46 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 5b 82 4c 19 44 44 31 46 14 1d 5f 41 44 52 08 a0 0a 93 45 44 50 56 00 a4 0a 1f a1 0b a4 7b 0b ff ff 44 49 44 58 00 14 1b 5f 44 43 53 00 a0 09 93 45 44 50 56 00 a4 00 a1 0a a4 43 44 44 53 44 49 44 58 14 28 5f 44 47 53 00 a0 18 90 93 7b 53 47 4d 44 0a 7f 00 01 5b 12 53 4e 58 44 00 a4 4e 58 44 58 a4 4e 44 44 53 44 49 44 58 14 1f 5f 44 53 53 01 a0 18 93 7b 68 0c 00 00 00 c0 00 0c 00 00 00 c0 70 4e 53 54 45 43 53 54 45 14 48 0d 5f 42 43 4c 00 a4 12 4f 0c 67 0a 50 0a 32 00 01 0a 02 0a 03 0a 04 0a 05 0a 06 0a 07 0a 08 0a 09 0a 0a 0a 0b 0a 0c 0a 0d 0a 0e 0a 0f 0a 10 0a 11 0a 12 0a 13 0a 14 0a 15 0a 16 0a 17 0a 18 0a 19 0a 1a 0a 1b 0a 1c 0a 1d 0a 1e 0a 1f 0a 20 0a 21 0a 22 0a 23 0a 24 0a 25 0a 26 0a 27 0a 28 0a 29 0a 2a 0a 2b 0a 2c 0a 2d 0a 2e 0a 2f 0a 30 0a 31 0a 32 0a 33 0a 34 0a 35 0a 36 0a 37 0a 38 0a 39 0a 3a 0a 3b 0a 3c 0a 3d 0a 3e 0a 3f 0a 40 0a 41 0a 42 0a 43 0a 44 0a 45 0a 46 0a 47 0a 48 0a 49 0a 4a 0a 4b 0a 4c 0a 4d 0a 4e 0a 4f 0a 50 0a 51 0a 52 0a 53 0a 54 0a 55 0a 56 0a 57 0a 58 0a 59 0a 5a 0a 5b 0a 5c 0a 5d 0a 5e 0a 5f 0a 60 0a 61 0a 62 0a 63 0a 64 14 2d 5f 42 43 4d 01 a0 26 90 92 95 68 00 92 94 68 0a 64 5c 2f 04 5f 53 42 5f 50 43 49 30 47 46 58 30 41 49 4e 54 01 68 70 68 42 52 54 4c 14 0b 5f 42 51 43 00 a4 42 52 54 4c 14 49 0b 53 44 44 4c 01 75 4e 44 49 44 70 7b 68 0b 0f 0f 00 60 7d 0c 00 00 00 80 60 61 a0 09 93 44 49 44 4c 60 a4 61 a0 09 93 44 44 4c 32 60 a4 61 a0 09 93 44 44 4c 33 60 a4 61 a0 09 93 44 44 4c 34 60 a4 61 a0 09 93 44 44 4c 35 60 a4 61 a0 09 93 44 44 4c 36 60 a4 61 a0 09 93 44 44 4c 37 60 a4 61 a0 09 93 44 44 4c 38 60 a4 61 a0 09 93 44 44 4c 39 60 a4 61 a0 09 93 44 44 31 30 60 a4 61 a0 09 93 44 44 31 31 60 a4 61 a0 09 93 44 44 31 32 60 a4 61 a0 09 93 44 44 31 33 60 a4 61 a0 09 93 44 44 31 34 60 a4 61 a0 09 93 44 44 31 35 60 a4 61 76 4e 44 49 44 a4 00 14 42 07 43 44 44 53 01 70 7b 68 0b 0f 0f 00 60 a0 07 93 00 60 a4 0a 1d a0 0a 93 43 41 44 4c 60 a4 0a 1f a0 0a 93 43 41 4c 32 60 a4 0a 1f a0 0a 93 43 41 4c 33 60 a4 0a 1f a0 0a 93 43 41 4c 34 60 a4 0a 1f a0 0a 93 43 41 4c 35 60 a4 0a 1f a0 0a 93 43 41 4c 36 60 a4 0a 1f a0 0a 93 43 41 4c 37 60 a4 0a 1f a0 0a 93 43 41 4c 38 60 a4 0a 1f a4 0a 1d 14 48 06 4e 44 44 53 01 70 7b 68 0b 0f 0f 00 60 a0 06 93 00 60 a4 00 a0 09 93 4e 41 44 4c 60 a4 01 a0 09 93 4e 44 4c 32 60 a4 01 a0 09 93 4e 44 4c 33 60 a4 01 a0 09 93 4e 44 4c 34 60 a4 01 a0 09 93 4e 44 4c 35 60 a4 01 a0 09 93 4e 44 4c 36 60 a4 01 a0 09 93 4e 44 4c 37 60 a4 01 a0 09 93 4e 44 4c 38 60 a4 01 a4 00 10 30 5c 2e 5f 53 42 5f 50 43 49 30 5b 80 4d 43 48 50 02 0a 40 0a c0 5b 81 18 4d 43 48 50 00 00 40 0a 41 55 44 45 08 00 48 25 54 41 53 4d 0a 00 06 5b 80 49 47 44 50 02 0a 40 0a c0 5b 81 45 05 49 47 44 50 00 00 40 09 00 01 47 49 56 44 01 00 02 47 55 4d 41 03 00 09 00 04 47 4d 46 4e 01 00 1b 00 40 46 41 53 4c 45 08 00 18 47 53 53 45 01 47 53 53 42 0e 47 53 45 53 01 00 30 00 0c 43 44 56 4c 01 00 03 00 18 4c 42 50 43 08 00 30 41 53 4c 53 20 5b 80 49 47 44 4d 00 41 53 4c 42 0b 00 20 5b 81 42 20 49 47 44 4d 00 53 49 47 4e 40 08 53 49 5a 45 20 4f 56 45 52 20 53 56 45 52 40 10 56 56 45 52 40 08 47 56 45 52 40 08 4d 42 4f 58 20 44 4d 4f 44 20 50 43 4f 4e 20 44 56 45 52 40 04 00 40 4a 44 52 44 59 20 43 53 54 53 20 43 45 56 54 20 00 40 0a 44 49 44 4c 20 44 44 4c 32 20 44 44 4c 33 20 44 44 4c 34 20 44 44 4c 35 20 44 44 4c 36 20 44 44 4c 37 20 44 44 4c 38 20 43 50 44 4c 20 43 50 4c 32 20 43 50 4c 33 20 43 50 4c 34 20 43 50 4c 35 20 43 50 4c 36 20 43 50 4c 37 20 43 50 4c 38 20 43 41 44 4c 20 43 41 4c 32 20 43 41 4c 33 20 43 41 4c 34 20 43 41 4c 35 20 43 41 4c 36 20 43 41 4c 37 20 43 41 4c 38 20 4e 41 44 4c 20 4e 44 4c 32 20 4e 44 4c 33 20 4e 44 4c 34 20 4e 44 4c 35 20 4e 44 4c 36 20 4e 44 4c 37 20 4e 44 4c 38 20 41 53 4c 50 20 54 49 44 58 20 43 48 50 44 20 43 4c 49 44 20 43 44 43 4b 20 53 58 53 57 20 45 56 54 53 20 43 4e 4f 54 20 4e 52 44 59 20 44 44 4c 39 20 44 44 31 30 20 44 44 31 31 20 44 44 31 32 20 44 44 31 33 20 44 44 31 34 20 44 44 31 35 20 43 50 4c 39 20 43 50 31 30 20 43 50 31 31 20 43 50 31 32 20 43 50 31 33 20 43 50 31 34 20 43 50 31 35 20 00 20 53 43 49 45 01 47 45 46 43 04 47 58 46 43 03 47 45 53 46 08 00 10 50 41 52 4d 20 44 53 4c 50 20 00 40 7a 41 52 44 59 20 41 53 4c 43 20 54 43 48 45 20 41 4c 53 49 20 42 43 4c 50 20 50 46 49 54 20 43 42 4c 56 20 42 43 4c 4d 40 14 43 50 46 4d 20 45 50 46 4d 20 50 4c 55 54 40 25 50 46 4d 42 20 43 43 44 56 20 50 43 46 54 20 53 52 4f 54 20 49 55 45 52 20 46 44 53 50 40 04 46 44 53 53 20 53 54 41 54 20 00 40 23 47 56 44 31 80 00 0c 50 48 45 44 20 42 44 44 43 40 80 08 44 42 54 42 12 32 15 00 0a 07 0a 38 0b c0 01 0b 00 0e 0a 3f 0b c7 01 0b 07 0e 0b f8 01 0b 38 0e 0b c0 0f 00 00 00 00 00 0b 00 70 0b 07 70 0b 38 70 0b c0 71 0b 00 7e 08 43 44 43 54 12 27 05 12 07 02 0a e4 0b 40 01 12 07 02 0a de 0b 4d 01 12 07 02 0a de 0b 4d 01 12 04 02 00 00 12 07 02 0a de 0b 4d 01 08 53 55 43 43 01 08 4e 56 4c 44 0a 02 08 43 52 49 54 0a 04 08 4e 43 52 54 0a 06 14 49 5e 47 53 43 49 08 14 40 1d 47 42 44 41 08 a0 1a 93 47 45 53 46 00 70 0b 59 06 50 41 52 4d 70 00 47 45 53 46 a4 53 55 43 43 a0 30 93 47 45 53 46 01 70 0c 82 04 30 00 50 41 52 4d a0 13 93 53 30 49 44 01 7d 50 41 52 4d 0b 00 01 50 41 52 4d 70 00 47 45 53 46 a4 53 55 43 43 a0 47 04 93 47 45 53 46 0a 04 7b 50 41 52 4d 0c 00 00 ff ef 50 41 52 4d 7b 50 41 52 4d 79 83 88 44 42 54 42 49 42 54 54 00 0a 10 00 50 41 52 4d 7d 49 42 54 54 50 41 52 4d 50 41 52 4d 70 00 47 45 53 46 a4 53 55 43 43 a0 4a 06 93 47 45 53 46 0a 05 70 49 50 53 43 50 41 52 4d 7d 50 41 52 4d 79 49 50 41 54 0a 08 00 50 41 52 4d 72 50 41 52 4d 0b 00 01 50 41 52 4d 7d 50 41 52 4d 79 4c 49 44 53 0a 10 00 50 41 52 4d 72 50 41 52 4d 0c 00 00 01 00 50 41 52 4d 7d 50 41 52 4d 79 49 42 49 41 0a 14 00 50 41 52 4d 70 00 47 45 53 46 a4 53 55 43 43 a0 43 07 93 47 45 53 46 0a 07 70 47 49 56 44 50 41 52 4d 7f 50 41 52 4d 01 50 41 52 4d 7d 50 41 52 4d 79 47 4d 46 4e 01 00 50 41 52 4d 7d 50 41 52 4d 0b 00 18 50 41 52 4d 7d 50 41 52 4d 79 49 44 4d 53 0a 11 00 50 41 52 4d 7d 79 83 88 83 88 43 44 43 54 48 56 43 4f 00 43 44 56 4c 00 0a 15 00 50 41 52 4d 50 41 52 4d 70 01 47 45 53 46 a4 53 55 43 43 a0 2a 93 47 45 53 46 0a 0a 70 00 50 41 52 4d a0 10 49 53 53 43 7d 50 41 52 4d 0a 03 50 41 52 4d 70 00 47 45 53 46 a4 53 55 43 43 a0 1f 93 47 45 53 46 0a 0b 70 4b 53 56 30 50 41 52 4d 70 4b 53 56 31 47 45 53 46 a4 53 55 43 43 70 00 47 45 53 46 a4 43 52 49 54 14 42 3d 53 42 43 42 08 a0 22 93 47 45 53 46 00 70 00 50 41 52 4d 70 0c dd 87 0f 00 50 41 52 4d 70 00 47 45 53 46 a4 53 55 43 43 a0 18 93 47 45 53 46 01 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 19 93 47 45 53 46 0a 03 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 19 93 47 45 53 46 0a 04 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 19 93 47 45 53 46 0a 05 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 4f 05 93 47 45 53 46 0a 07 a0 19 93 53 30 49 44 01 a0 11 93 7b 50 41 52 4d 0a ff 00 01 5c 47 55 41 4d 01 a0 2a 93 50 41 52 4d 00 70 43 4c 49 44 60 a0 1c 7b 0c 00 00 00 80 60 00 7b 43 4c 49 44 0a 0f 43 4c 49 44 47 4c 49 44 43 4c 49 44 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 3a 93 47 45 53 46 0a 08 a0 20 93 53 30 49 44 01 70 7b 7a 50 41 52 4d 0a 08 00 0a ff 00 60 a0 0a 93 60 00 5c 47 55 41 4d 00 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 24 93 47 45 53 46 0a 09 7b 50 41 52 4d 0a ff 49 42 54 54 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 46 05 93 47 45 53 46 0a 0a 7b 50 41 52 4d 0a ff 49 50 53 43 a0 21 7b 7a 50 41 52 4d 0a 08 00 0a ff 00 7b 7a 50 41 52 4d 0a 08 00 0a ff 49 50 41 54 76 49 50 41 54 7b 7a 50 41 52 4d 0a 14 00 0a 07 49 42 49 41 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 44 05 93 47 45 53 46 0a 0b 7b 7a 50 41 52 4d 01 00 01 49 46 31 45 a0 1b 7b 50 41 52 4d 0c 00 e0 01 00 00 7b 7a 50 41 52 4d 0a 0d 00 0a 0f 49 44 4d 53 a1 10 7b 7a 50 41 52 4d 0a 11 00 0a 0f 49 44 4d 53 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 19 93 47 45 53 46 0a 10 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 2c 93 47 45 53 46 0a 11 70 79 4c 49 44 53 0a 08 00 50 41 52 4d 72 50 41 52 4d 0b 00 01 50 41 52 4d 70 00 47 45 53 46 a4 53 55 43 43 a0 49 04 93 47 45 53 46 0a 12 a0 26 7b 50 41 52 4d 01 00 a0 10 93 7a 50 41 52 4d 01 00 01 70 01 49 53 53 43 a1 0c 70 00 47 45 53 46 a4 43 52 49 54 a1 07 70 00 49 53 53 43 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 19 93 47 45 53 46 0a 13 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 24 93 47 45 53 46 0a 14 7b 50 41 52 4d 0a 0f 50 41 56 50 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 a0 49 0f 93 47 45 53 46 0a 15 a0 49 0a 93 50 41 52 4d 01 7d 5c 2f 03 5f 53 42 5f 50 43 49 30 41 55 44 45 0a 20 5c 2f 03 5f 53 42 5f 50 43 49 30 41 55 44 45 5c 2f 04 5f 53 42 5f 50 43 49 30 42 30 44 33 41 42 57 41 01 5c 2f 04 5f 53 42 5f 50 43 49 30 42 30 44 33 41 52 53 54 5c 2f 04 5f 53 42 5f 50 43 49 30 42 30 44 33 41 53 54 52 5c 2f 04 5f 53 42 5f 50 43 49 30 42 30 44 33 41 49 4e 49 5c 2f 04 5f 53 42 5f 50 43 49 30 42 30 44 33 43 58 44 43 5c 2f 04 5f 53 42 5f 50 43 49 30 42 30 44 33 41 42 57 41 00 86 5c 2e 5f 53 42 5f 50 43 49 30 00 a0 34 93 50 41 52 4d 00 7b 5c 2f 03 5f 53 42 5f 50 43 49 30 41 55 44 45 0a df 5c 2f 03 5f 53 42 5f 50 43 49 30 41 55 44 45 86 5c 2e 5f 53 42 5f 50 43 49 30 00 70 00 47 45 53 46 70 00 50 41 52 4d a4 53 55 43 43 70 00 47 45 53 46 a4 53 55 43 43 a0 11 93 47 45 46 43 0a 04 70 47 42 44 41 47 58 46 43 a0 11 93 47 45 46 43 0a 06 70 53 42 43 42 47 58 46 43 70 00 47 45 46 43 70 01 53 43 49 53 70 00 47 53 53 45 70 00 53 43 49 45 a4 00 14 0c 50 44 52 44 00 a4 92 44 52 44 59 14 1d 50 53 54 53 00 a0 0e 94 43 53 54 53 0a 02 5b 22 41 53 4c 50 a4 93 43 53 54 53 0a 03 14 4e 07 47 4e 4f 54 02 a0 07 50 44 52 44 a4 01 70 68 43 45 56 54 70 0a 03 43 53 54 53 a0 3d 90 93 43 48 50 44 00 93 69 00 a0 1e 91 94 4f 53 59 53 0b d0 07 95 4f 53 59 53 0b d6 07 86 5c 2e 5f 53 42 5f 50 43 49 30 69 a1 12 86 5c 2f 03 5f 53 42 5f 50 43 49 30 47 46 58 30 69 a0 0d 5b 12 48 4e 4f 54 00 48 4e 4f 54 68 a1 13 86 5c 2f 03 5f 53 42 5f 50 43 49 30 47 46 58 30 0a 80 a4 00 14 13 47 48 44 53 01 70 68 54 49 44 58 a4 47 4e 4f 54 01 00 14 35 47 4c 49 44 01 a0 0b 93 68 01 70 0a 03 43 4c 49 44 a1 07 70 68 43 4c 49 44 a0 18 47 4e 4f 54 0a 02 00 7d 43 4c 49 44 0c 00 00 00 80 43 4c 49 44 a4 01 a4 00 14 14 47 44 43 4b 01 70 68 43 44 43 4b a4 47 4e 4f 54 0a 04 00 14 19 50 41 52 44 00 a0 0c 92 41 52 44 59 5b 22 41 53 4c 50 a4 92 41 52 44 59 14 36 49 55 45 48 09 7b 49 55 45 52 0a c0 49 55 45 52 7f 49 55 45 52 79 01 68 00 49 55 45 52 a0 0e 92 94 68 0a 04 a4 41 49 4e 54 0a 05 00 a1 08 a4 41 49 4e 54 68 00 14 4f 15 41 49 4e 54 02 a0 0e 92 7b 54 43 48 45 79 01 68 00 00 a4 01 a0 07 50 41 52 44 a4 01 a0 34 90 92 95 68 0a 05 92 94 68 0a 07 70 79 01 68 00 41 53 4c 43 70 01 41 53 4c 45 70 00 62 a2 13 90 95 62 0a fa 92 93 41 53 4c 43 00 5b 22 0a 04 75 62 a4 00 a0 40 0c 93 68 0a 02 a0 47 09 43 50 46 4d 7b 43 50 46 4d 0a 0f 60 7b 45 50 46 4d 0a 0f 61 a0 2a 93 60 01 a0 0d 7b 61 0a 06 00 70 0a 06 50 46 49 54 a1 17 a0 0d 7b 61 0a 08 00 70 0a 08 50 46 49 54 a1 07 70 01 50 46 49 54 a0 2a 93 60 0a 06 a0 0d 7b 61 0a 08 00 70 0a 08 50 46 49 54 a1 16 a0 0b 7b 61 01 00 70 01 50 46 49 54 a1 08 70 0a 06 50 46 49 54 a0 2a 93 60 0a 08 a0 0b 7b 61 01 00 70 01 50 46 49 54 a1 18 a0 0d 7b 61 0a 06 00 70 0a 06 50 46 49 54 a1 08 70 0a 08 50 46 49 54 a1 0c 7f 50 46 49 54 0a 07 50 46 49 54 7d 50 46 49 54 0c 00 00 00 80 50 46 49 54 70 0a 04 41 53 4c 43 a1 42 04 a0 28 93 68 01 70 78 77 69 0a ff 00 0a 64 00 00 42 43 4c 50 7d 42 43 4c 50 0c 00 00 00 80 42 43 4c 50 70 0a 02 41 53 4c 43 a1 16 a0 10 93 68 00 70 69 41 4c 53 49 70 01 41 53 4c 43 a1 03 a4 01 70 01 41 53 4c 45 a4 00 14 17 53 43 49 50 00 a0 0e 92 93 4f 56 45 52 00 a4 92 47 53 4d 49 a4 00 5b 82 4a 06 5c 2e 5f 53 42 5f 4d 45 4d 32 08 5f 48 49 44 0c 41 d0 0c 01 08 5f 55 49 44 0a 02 08 43 52 53 32 11 1d 0a 1a 86 09 00 01 00 00 00 20 00 00 20 00 86 09 00 01 00 40 00 40 00 10 00 00 79 00 14 1d 5f 53 54 41 00 a0 14 49 47 44 53 a0 0e 93 50 4e 48 4d 0c c1 06 03 00 a4 0a 0f a4 00 14 0b 5f 43 52 53 00 a4 43 52 53 32 } */ /* BDAT: Length=48, Revision=1, Checksum=181, OEMID=INTEL, OEM Table ID=HSW-LPT, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20090903 Data={ 42 44 41 54 30 00 00 00 01 b5 49 4e 54 45 4c 00 48 53 57 2d 4c 50 54 00 00 10 00 00 49 4e 54 4c 03 09 09 20 00 00 00 00 00 20 ff d9 00 00 00 00 } */ /* DMAR: Length=184, Revision=1, Checksum=204, OEMID=INTEL, OEM Table ID=HSW, OEM Revision=0x1, Creator ID=INTL, Creator Revision=0x1 Host Address Width=39 Flags={INTR_REMAP} Type=DRHD Length=24 Flags={} Segment=0 Address=0x00000000fed90000 Device Scope: Type=PCI Endpoint Device Length=8 EnumerationId=0 StartBusNumber=0 Path={2:0} Type=DRHD Length=32 Flags={INCLUDE_ALL} Segment=0 Address=0x00000000fed91000 Device Scope: Type=IOAPIC Length=8 EnumerationId=8 StartBusNumber=240 Path={31:0} Type=HPET Length=8 EnumerationId=0 StartBusNumber=240 Path={15:0} Type=RMRR Length=48 Segment=0 BaseAddress=0x00000000dbe50000 LimitAddress=0x00000000dbe5ffff Device Scope: Type=PCI Endpoint Device Length=8 EnumerationId=0 StartBusNumber=0 Path={29:0} Type=PCI Endpoint Device Length=8 EnumerationId=0 StartBusNumber=0 Path={26:0} Type=PCI Endpoint Device Length=8 EnumerationId=0 StartBusNumber=0 Path={20:0} Type=RMRR Length=32 Segment=0 BaseAddress=0x00000000dd000000 LimitAddress=0x00000000df1fffff Device Scope: Type=PCI Endpoint Device Length=8 EnumerationId=0 StartBusNumber=0 Path={2:0} */ /* EINJ: Length=304, Revision=1, Checksum=117, OEMID=AMI, OEM Table ID=AMI EINJ, OEM Revision=0x0, Creator ID=, Creator Revision=0x0 Header Length=12 Flags=0x0 Entries=8 ACTION={Begin Operation} INSTRUCTION={Write Register Value} FLAGS={} RegisterRegion=0xda04cd98:0[8] (Memory) MASK=0x000000ff ACTION={Get Trigger Table} INSTRUCTION={Read Register} FLAGS={} RegisterRegion=0x00000000da04cd9a:0[64] (Memory) MASK=0xffffffffffffffff ACTION={Set Error Type} INSTRUCTION={Write Register} FLAGS={} RegisterRegion=0xda04cda2:0[32] (Memory) MASK=0xffffffff ACTION={Get Error Type} INSTRUCTION={Read Register} FLAGS={} RegisterRegion=0xda04cdaa:0[32] (Memory) MASK=0xffffffff ACTION={End Operation} INSTRUCTION={Write Register Value} FLAGS={} RegisterRegion=0xda04cdae:0[16] (Memory) MASK=0x0000ffff ACTION={Execute Operation} INSTRUCTION={Write Register Value} FLAGS={} RegisterRegion=0xb2:0[8] (IO) MASK=0x000000ff ACTION={Check Busy Status} INSTRUCTION={Read Register Value} FLAGS={} RegisterRegion=0xda04cda6:0[8] (Memory) MASK=0x00000001 ACTION={Get Command Status} INSTRUCTION={Read Register} FLAGS={} RegisterRegion=0xda04cda8:0[16] (Memory) MASK=0x0000fffe */ /* ERST: Length=560, Revision=1, Checksum=112, OEMID=AMIER, OEM Table ID=AMI ERST, OEM Revision=0x0, Creator ID=, Creator Revision=0x0 Header Length=12 Entries=16 ACTION={Begin Write} INSTRUCTION={Write Register Value} FLAGS={} RegisterRegion=0xd9fd3018:0[8] (Memory) MASK=0x000000ff ACTION={Begin Read} INSTRUCTION={Write Register Value} FLAGS={} RegisterRegion=0xd9fd3018:0[8] (Memory) MASK=0x000000ff ACTION={Begin Clear} INSTRUCTION={Write Register Value} FLAGS={} RegisterRegion=0xd9fd3018:0[8] (Memory) MASK=0x000000ff ACTION={End} INSTRUCTION={Write Register Value} FLAGS={} RegisterRegion=0xd9fd3019:0[8] (Memory) MASK=0x000000ff ACTION={Set Record Offset} INSTRUCTION={Write Register} FLAGS={} RegisterRegion=0xd9fd301a:0[32] (Memory) MASK=0xffffffff ACTION={Execute Operation} INSTRUCTION={Write Register Value} FLAGS={} RegisterRegion=0xb2:0[8] (IO) MASK=0x000000ff ACTION={Check Busy Status} INSTRUCTION={Read Register Value} FLAGS={} RegisterRegion=0xd9fd301e:0[8] (Memory) MASK=0x000000ff ACTION={Get Command Status} INSTRUCTION={Read Register} FLAGS={} RegisterRegion=0xd9fd301f:0[8] (Memory) MASK=0x000000ff ACTION={Get Record ID} INSTRUCTION={Read Register} FLAGS={} RegisterRegion=0x00000000d9fd3020:0[64] (Memory) MASK=0xffffffffffffffff ACTION={Set Record ID} INSTRUCTION={Write Register} FLAGS={} RegisterRegion=0x00000000d9fd3028:0[64] (Memory) MASK=0xffffffffffffffff ACTION={Get Record Count} INSTRUCTION={Read Register} FLAGS={} RegisterRegion=0xd9fd3030:0[16] (Memory) MASK=0x0000ffff ACTION={Begin Dummy Write} INSTRUCTION={Write Register Value} FLAGS={} RegisterRegion=0xd9fd3018:0[8] (Memory) MASK=0x000000ff ACTION={Unused} INSTRUCTION={Noop} FLAGS={} RegisterRegion=0x00000000:0[8] (Memory) MASK=0x000000ff ACTION={Get Error Range} INSTRUCTION={Read Register} FLAGS={} RegisterRegion=0x00000000d9fd3032:0[64] (Memory) MASK=0xffffffffffffffff ACTION={Get Error Length} INSTRUCTION={Read Register} FLAGS={} RegisterRegion=0xd9fd303a:0[32] (Memory) MASK=0xffffffff ACTION={Get Error Attributes} INSTRUCTION={Read Register} FLAGS={} RegisterRegion=0xd9fd303e:0[8] (Memory) MASK=0x000000ff */ /* HEST: Length=168, Revision=1, Checksum=130, OEMID=AMI, OEM Table ID=AMI HEST, OEM Revision=0x0, Creator ID=, Creator Revision=0x0 Error Source Count=2 Type={Generic Hardware Error Source} SourceId=0 Releated SourceId=0 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=1 Max Raw Data Length=4096 Error Status Address=0x00000000d9fd0018:0[64] (Memory) HW Error Notification={ Type={NMI} Length=28 Config Write Enable={} Poll Interval=0 msec Interrupt Vector=2 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=4096 Type={Generic Hardware Error Source} SourceId=1 Releated SourceId=0 Enabled={YES} Number of Records to pre-allocate=1 Max Sections per Record=1 Max Raw Data Length=4096 Error Status Address=0x00000000d9fd1020:0[64] (Memory) HW Error Notification={ Type={POLLED} Length=28 Config Write Enable={POLL_INTERVAL,POLL_THRESHOLD_VALUE,POLL_THRESHOLD_WINDOW,ERR_THRESHOLD_VALUE,ERR_THRESHOLD_WINDOW} Poll Interval=60000 msec Interrupt Vector=2 Switch To Polling Threshold Value=0 Switch To Polling Threshold Window=0 msec Error Threshold Value=0 Error Threshold Window=0 msec } Error Block Length=4096 */ /* BERT: Length=48, Revision=1, Checksum=211, OEMID=AMI, OEM Table ID=AMI BERT, OEM Revision=0x0, Creator ID=, Creator Revision=0x0 Length of Boot Error Region=20 bytes Physical Address of Region=0xda80ce98 */ /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20190405 (64-bit version) * Copyright (c) 2000 - 2019 Intel Corporation * * Disassembling to symbolic ASL+ operators * * Disassembly of /tmp/acpidump.ITdJ1d/acpdump.din, Mon Mar 18 13:40:08 2024 * * Original Table Header: * Signature "DSDT" * Length 0x00011F5F (73567) * Revision 0x02 * Checksum 0x8E * OEM ID "FTS " * OEM Table ID "D3219-A1" * OEM Revision 0x00000114 (276) * Compiler ID "INTL" * Compiler Version 0x20091112 (537465106) */ DefinitionBlock ("", "DSDT", 2, "FTS ", "D3219-A1", 0x00000114) { /* * iASL Warning: There were 10 external control methods found during * disassembly, but only 0 were resolved (10 unresolved). Additional * ACPI tables may be required to properly disassemble the code. This * resulting disassembler output file may not compile because the * disassembler did not know how many arguments to assign to the * unresolved methods. Note: SSDTs can be dynamically loaded at * runtime and may or may not be available via the host OS. * * To specify the tables needed to resolve external control method * references, the -e option can be used to specify the filenames. * Example iASL invocations: * iasl -e ssdt1.aml ssdt2.aml ssdt3.aml -d dsdt.aml * iasl -e dsdt.aml ssdt2.aml -d ssdt1.aml * iasl -e ssdt*.aml -d dsdt.aml * * In addition, the -fe option can be used to specify a file containing * control method external declarations with the associated method * argument counts. Each line of the file must be of the form: * External (, MethodObj, ) * Invocation: * iasl -fe refs.txt -d dsdt.aml * * The following methods were unresolved and many not compile properly * because the disassembler had to guess at the number of arguments * required for each: */ External (_SB_.IAOE.ECTM, UnknownObj) External (_SB_.IAOE.FFSE, UnknownObj) External (_SB_.IAOE.IBT1, UnknownObj) External (_SB_.IAOE.ITMR, UnknownObj) External (_SB_.IAOE.PTSL, UnknownObj) External (_SB_.IAOE.RCTM, UnknownObj) External (_SB_.IAOE.WKRS, UnknownObj) External (_SB_.IETM, UnknownObj) External (_SB_.IFFS.FFSS, UnknownObj) External (_SB_.PCCD, UnknownObj) External (_SB_.PCCD.PENB, UnknownObj) External (_SB_.PCI0.PAUD.PUAM, MethodObj) // Warning: Unknown method, guessing 0 arguments External (_SB_.PCI0.PEG0.PEGP.EPON, MethodObj) // Warning: Unknown method, guessing 0 arguments External (_SB_.PCI0.RP05.PEGP.EPON, MethodObj) // Warning: Unknown method, guessing 0 arguments External (_SB_.PCI0.XHC_.DUAM, MethodObj) // Warning: Unknown method, guessing 0 arguments External (_SB_.PRAD, UnknownObj) External (_SB_.TPM_.PTS_, MethodObj) // Warning: Unknown method, guessing 1 arguments External (HDOS, MethodObj) // Warning: Unknown method, guessing 0 arguments External (HNOT, MethodObj) // Warning: Unknown method, guessing 1 arguments External (IDAB, MethodObj) // Warning: Unknown method, guessing 0 arguments External (MDBG, IntObj) External (PS0X, MethodObj) // Warning: Unknown method, guessing 0 arguments External (PS3X, MethodObj) // Warning: Unknown method, guessing 0 arguments Name (SP1O, 0x4E) Name (IO1B, 0x0600) Name (IO1L, 0x40) Name (IOEM, 0x0640) Name (IOEL, 0x10) Name (KBFG, Zero) Name (MSFG, Zero) Name (IOES, Zero) Name (SMBS, 0x0580) Name (SMBL, 0x20) Name (PMBS, 0x1800) Name (GPBS, 0x1C00) Name (SMIP, 0xB2) Name (APCB, 0xFEC00000) Name (APCL, 0x1000) Name (SMCR, 0x1830) Name (HPTB, 0xFED00000) Name (HPTC, 0xFED1F404) Name (FLSZ, 0x0050D000) Name (SRCB, 0xFED1C000) Name (RCLN, 0x4000) Name (PEBS, 0xF8000000) Name (PELN, 0x04000000) Name (LAPB, 0xFEE00000) Name (EGPB, 0xFED19000) Name (MCHB, 0xFED10000) Name (VTBS, 0xFED90000) Name (VTLN, 0x4000) Name (ACPH, 0xDE) Name (ASSB, Zero) Name (AOTB, Zero) Name (AAXB, Zero) Name (HIDK, 0x0303D041) Name (HIDM, 0x030FD041) Name (CIDK, 0x0B03D041) Name (CIDM, 0x130FD041) Name (PEHP, One) Name (SHPC, Zero) Name (PEPM, One) Name (PEER, One) Name (PECS, One) Name (ITKE, Zero) Name (MBEC, 0xFFFF) Name (SRSI, 0xB2) Name (CSMI, 0x61) Name (PETE, Zero) Name (PSTE, Zero) Name (TSTE, Zero) Name (TCPU, One) Name (FMBL, One) Name (FDTP, 0x02) Name (FUPS, 0x03) Name (FUWS, 0x04) Name (BGR, One) Name (BFR, 0x02) Name (BBR, 0x03) Name (BWC, 0x04) Name (BWT1, 0x20) Name (BFHC, 0x0100) Name (TRTP, One) Name (WDTE, One) Name (TRTD, 0x02) Name (TRTI, 0x03) Name (PFTI, 0x04) Name (GCDD, One) Name (DSTA, 0x0A) Name (DSLO, 0x0C) Name (DSLC, 0x0E) Name (PITS, 0x10) Name (SBCS, 0x12) Name (SALS, 0x13) Name (LSSS, 0x2A) Name (SOOT, 0x35) Name (PDBR, 0x4D) Name (BW1P, 0x21) Name (BW2C, 0x22) Name (BW2P, 0x23) Name (BSPC, 0x24) Name (BSPP, 0x25) Name (BICO, 0x27) Name (BICC, 0x28) Name (BHB, 0x30) Name (BFS2, 0x31) Name (BFS3, 0x32) Name (BFS4, 0x33) Name (BRH, 0x35) Name (DSSP, Zero) Name (FHPP, Zero) Name (SMIA, 0xB2) Name (SMIB, 0xB3) Name (OFST, 0x35) Name (TPMF, Zero) Name (TCMF, Zero) Name (TMF1, Zero) Name (TMF2, Zero) Name (TMF3, Zero) Name (WHEA, One) Name (TRST, 0x02) Name (PMLN, 0x0100) Name (GPLN, 0x0400) Name (PLD1, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (PLD2, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 0....... } }) Name (UPC1, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (UPC2, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (UPC3, Package (0x04) { Zero, 0xFF, Zero, Zero }) Name (UPC4, Package (0x04) { 0xFF, 0x03, Zero, Zero }) Name (U1U1, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U1P1, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U1U2, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U1P2, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U1U3, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U1P3, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U1U4, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U1P4, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U1U5, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U1P5, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U1U6, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U1P6, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U1U7, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U1P7, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U1U8, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (U1P8, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 0....... } }) Name (U2U1, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U2P1, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U2U2, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U2P2, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U2U3, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U2P3, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U2U4, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (U2P4, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 1....... } }) Name (U2U5, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (U2P5, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 0....... } }) Name (U2U6, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (U2P6, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 0....... } }) Name (LEDO, 0x18) Name (LEDB, 0x1C18) Name (LEDV, 0x40) Name (SS1, One) Name (SS2, Zero) Name (SS3, Zero) Name (SS4, One) Name (IOST, 0x0001) Name (TOPM, 0x00000000) Name (ROMS, 0xFFE00000) Name (VGAF, One) OperationRegion (GNVS, SystemMemory, 0xDA80DC18, 0x02B2) Field (GNVS, AnyAcc, Lock, Preserve) { OSYS, 16, SMIF, 8, PRM0, 8, PRM1, 8, SCIF, 8, PRM2, 8, PRM3, 8, LCKF, 8, PRM4, 8, PRM5, 8, P80D, 32, PWRS, 8, DBGS, 8, THOF, 8, ACT1, 8, ACTT, 8, PSVT, 8, TC1V, 8, TC2V, 8, TSPV, 8, CRTT, 8, DTSE, 8, DTS1, 8, DTS2, 8, DTSF, 8, Offset (0x1E), Offset (0x25), REVN, 8, Offset (0x28), APIC, 8, TCNT, 8, PCP0, 8, PCP1, 8, PPCM, 8, PPMF, 32, C67L, 8, NATP, 8, CMAP, 8, CMBP, 8, LPTP, 8, FDCP, 8, CMCP, 8, CIRP, 8, SMSC, 8, W381, 8, SMC1, 8, EMAE, 8, EMAP, 16, EMAL, 16, Offset (0x42), MEFE, 8, DSTS, 8, Offset (0x48), MORD, 8, TCGP, 8, PPRP, 32, PPRQ, 8, LPPR, 8, GTF0, 56, GTF2, 56, IDEM, 8, GTF1, 56, BID, 16, PLID, 8, ECTG, 8, Offset (0x70), OSCC, 8, NEXP, 8, SBV1, 8, SBV2, 8, Offset (0x7A), DSEN, 8, ECON, 8, GPIC, 8, CTYP, 8, L01C, 8, VFN0, 8, VFN1, 8, VFN2, 8, VFN3, 8, VFN4, 8, VFN5, 8, VFN6, 8, VFN7, 8, VFN8, 8, VFN9, 8, Offset (0x8F), ATMC, 8, PTMC, 8, ATRA, 8, PTRA, 8, PNHM, 32, TBAB, 32, TBAH, 32, RTIP, 8, TSOD, 8, ATPC, 8, PTPC, 8, PFLV, 8, BREV, 8, PDTS, 8, PKGA, 8, PAMT, 8, AC0F, 8, AC1F, 8, DTS3, 8, DTS4, 8, Offset (0xB0), LTR1, 8, LTR2, 8, LTR3, 8, LTR4, 8, LTR5, 8, LTR6, 8, LTR7, 8, LTR8, 8, OBF1, 8, OBF2, 8, OBF3, 8, OBF4, 8, OBF5, 8, OBF6, 8, OBF7, 8, OBF8, 8, XHCI, 8, XTUB, 32, XTUS, 32, XMPB, 32, DDRF, 8, RTD3, 8, PEP0, 8, PEP3, 8, DPTF, 8, SADE, 8, SACR, 8, SAHT, 8, PCHD, 8, PCHC, 8, PCHH, 8, CTDP, 8, LPMP, 8, LPMV, 8, ECEU, 8, TGFG, 16, MEMD, 8, MEMC, 8, MEMH, 8, FND1, 8, FND2, 8, AMBD, 8, AMAT, 8, AMPT, 8, AMCT, 8, AMHT, 8, SKDE, 8, SKAT, 8, SKPT, 8, SKCT, 8, SKHT, 8, EFDE, 8, EFAT, 8, EFPT, 8, EFCT, 8, EFHT, 8, VRDE, 8, VRAT, 8, VRPT, 8, VRCT, 8, VRHT, 8, DPAP, 8, DPPP, 8, DPCP, 8, DCMP, 8, TRTV, 8, LPOE, 8, LPOP, 8, LPOS, 8, LPOW, 8, LPER, 8, PPSZ, 32, DISE, 8, PFMA, 64, PFMS, 8, PFIA, 16, ICNF, 8, DSP0, 32, DSP1, 32, NFCE, 8, CODS, 8, SNHE, 8, S0ID, 8, CTDB, 8, Offset (0x207), PWRE, 8, PWRP, 8, XHPR, 8, SDS0, 8, SDS1, 16, SDS2, 8, SDS3, 8, SDS4, 8, SDS5, 8, Offset (0x212), RIC0, 8, PEPY, 8, DVS0, 8, DVS1, 8, DVS2, 8, DVS3, 8, GBSX, 8, IUBE, 8, IUCE, 8, IUDE, 8, ECNO, 8, AUDD, 16, DSPD, 16, IC0D, 16, IC1D, 16, IC1S, 16, VRRD, 16, PSCP, 8, RWAG, 8, I20D, 16, I21D, 16, Offset (0x231), RCG0, 8, ECDB, 8, P2ME, 8, SSH0, 16, SSL0, 16, SSD0, 16, FMH0, 16, FML0, 16, FMD0, 16, FPH0, 16, FPL0, 16, FPD0, 16, SSH1, 16, SSL1, 16, SSD1, 16, FMH1, 16, FML1, 16, FMD1, 16, FPH1, 16, FPL1, 16, FPD1, 16, M0C0, 16, M1C0, 16, M2C0, 16, M0C1, 16, M1C1, 16, M2C1, 16, M0C2, 16, M1C2, 16, M0C3, 16, M1C3, 16, M0C4, 16, M1C4, 16, M0C5, 16, M1C5, 16, TBSF, 8, GIRQ, 32, DMTP, 8, DMTD, 8, DMSH, 8, LANP, 8, Offset (0x27E), SHSB, 8, PLCS, 8, PLVL, 16, GN1E, 8, G1AT, 8, G1PT, 8, G1CT, 8, G1HT, 8, GN2E, 8, G2AT, 8, G2PT, 8, G2CT, 8, G2HT, 8, WWSD, 8, CVSD, 8, SSDD, 8, INLD, 8, IFAT, 8, IFPT, 8, IFCT, 8, IFHT, 8, DOSD, 8, USBH, 8, BCV4, 8, WTV0, 8, WTV1, 8, APFU, 8, SOHP, 8, NOHP, 8, TBSE, 8, WKFN, 8, PEPC, 16, VRSD, 16, PB1E, 8, WAND, 8, WWAT, 8, WWPT, 8, WWCT, 8, WWHT, 8, Offset (0x2AD), MPLT, 16, GR13, 8, SPST, 8, ECLP, 8 } Scope (_SB) { Name (PR00, Package (0x18) { Package (0x04) { 0x001FFFFF, Zero, LNKF, Zero }, Package (0x04) { 0x001FFFFF, One, LNKD, Zero }, Package (0x04) { 0x001FFFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x001FFFFF, 0x03, LNKA, Zero }, Package (0x04) { 0x001DFFFF, Zero, LNKH, Zero }, Package (0x04) { 0x001AFFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0003FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0004FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0004FFFF, One, LNKB, Zero }, Package (0x04) { 0x0004FFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x0004FFFF, 0x03, LNKD, Zero }, Package (0x04) { 0x0016FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0001FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0001FFFF, One, LNKB, Zero }, Package (0x04) { 0x0001FFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x0001FFFF, 0x03, LNKD, Zero }, Package (0x04) { 0x0016FFFF, One, LNKD, Zero }, Package (0x04) { 0x0014FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x0002FFFF, Zero, LNKA, Zero }, Package (0x04) { 0x001CFFFF, Zero, LNKA, Zero }, Package (0x04) { 0x001CFFFF, One, LNKB, Zero }, Package (0x04) { 0x001CFFFF, 0x02, LNKC, Zero }, Package (0x04) { 0x001CFFFF, 0x03, LNKD, Zero }, Package (0x04) { 0x0019FFFF, Zero, LNKE, Zero } }) Name (AR00, Package (0x18) { Package (0x04) { 0x001FFFFF, Zero, Zero, 0x15 }, Package (0x04) { 0x001FFFFF, One, Zero, 0x13 }, Package (0x04) { 0x001FFFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0x001FFFFF, 0x03, Zero, 0x10 }, Package (0x04) { 0x001DFFFF, Zero, Zero, 0x17 }, Package (0x04) { 0x001AFFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x0003FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x0004FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x0004FFFF, One, Zero, 0x11 }, Package (0x04) { 0x0004FFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0x0004FFFF, 0x03, Zero, 0x13 }, Package (0x04) { 0x0016FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x0001FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x0001FFFF, One, Zero, 0x11 }, Package (0x04) { 0x0001FFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0x0001FFFF, 0x03, Zero, 0x13 }, Package (0x04) { 0x0016FFFF, One, Zero, 0x13 }, Package (0x04) { 0x0014FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x0002FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x001CFFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x001CFFFF, One, Zero, 0x11 }, Package (0x04) { 0x001CFFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0x001CFFFF, 0x03, Zero, 0x13 }, Package (0x04) { 0x0019FFFF, Zero, Zero, 0x14 } }) Name (PR04, Package (0x04) { Package (0x04) { 0xFFFF, Zero, LNKA, Zero }, Package (0x04) { 0xFFFF, One, LNKB, Zero }, Package (0x04) { 0xFFFF, 0x02, LNKC, Zero }, Package (0x04) { 0xFFFF, 0x03, LNKD, Zero } }) Name (AR04, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x10 }, Package (0x04) { 0xFFFF, One, Zero, 0x11 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } }) Name (PR05, Package (0x04) { Package (0x04) { 0xFFFF, Zero, LNKB, Zero }, Package (0x04) { 0xFFFF, One, LNKC, Zero }, Package (0x04) { 0xFFFF, 0x02, LNKD, Zero }, Package (0x04) { 0xFFFF, 0x03, LNKA, Zero } }) Name (AR05, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x11 }, Package (0x04) { 0xFFFF, One, Zero, 0x12 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x13 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 } }) Name (PR06, Package (0x04) { Package (0x04) { 0xFFFF, Zero, LNKC, Zero }, Package (0x04) { 0xFFFF, One, LNKD, Zero }, Package (0x04) { 0xFFFF, 0x02, LNKA, Zero }, Package (0x04) { 0xFFFF, 0x03, LNKB, Zero } }) Name (AR06, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x12 }, Package (0x04) { 0xFFFF, One, Zero, 0x13 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x10 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x11 } }) Name (PR08, Package (0x04) { Package (0x04) { 0xFFFF, Zero, LNKA, Zero }, Package (0x04) { 0xFFFF, One, LNKB, Zero }, Package (0x04) { 0xFFFF, 0x02, LNKC, Zero }, Package (0x04) { 0xFFFF, 0x03, LNKD, Zero } }) Name (AR08, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x10 }, Package (0x04) { 0xFFFF, One, Zero, 0x11 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } }) Name (PR02, Package (0x04) { Package (0x04) { 0xFFFF, Zero, LNKA, Zero }, Package (0x04) { 0xFFFF, One, LNKB, Zero }, Package (0x04) { 0xFFFF, 0x02, LNKC, Zero }, Package (0x04) { 0xFFFF, 0x03, LNKD, Zero } }) Name (AR02, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x10 }, Package (0x04) { 0xFFFF, One, Zero, 0x11 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } }) Name (PR0A, Package (0x04) { Package (0x04) { 0xFFFF, Zero, LNKB, Zero }, Package (0x04) { 0xFFFF, One, LNKC, Zero }, Package (0x04) { 0xFFFF, 0x02, LNKD, Zero }, Package (0x04) { 0xFFFF, 0x03, LNKA, Zero } }) Name (AR0A, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x11 }, Package (0x04) { 0xFFFF, One, Zero, 0x12 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x13 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 } }) Name (PR0B, Package (0x04) { Package (0x04) { 0xFFFF, Zero, LNKC, Zero }, Package (0x04) { 0xFFFF, One, LNKD, Zero }, Package (0x04) { 0xFFFF, 0x02, LNKA, Zero }, Package (0x04) { 0xFFFF, 0x03, LNKB, Zero } }) Name (AR0B, Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x12 }, Package (0x04) { 0xFFFF, One, Zero, 0x13 }, Package (0x04) { 0xFFFF, 0x02, Zero, 0x10 }, Package (0x04) { 0xFFFF, 0x03, Zero, 0x11 } }) Name (PRSA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,10,11,12,14,15} }) Alias (PRSA, PRSB) Alias (PRSA, PRSC) Alias (PRSA, PRSD) Alias (PRSA, PRSE) Alias (PRSA, PRSF) Alias (PRSA, PRSG) Alias (PRSA, PRSH) Device (PCI0) { Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID Name (_ADR, Zero) // _ADR: Address Method (^BN00, 0, NotSerialized) { Return (Zero) } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (BN00 ()) } Name (_UID, Zero) // _UID: Unique ID Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR00 ()) } Return (PR00 ()) } OperationRegion (HBUS, PCI_Config, Zero, 0x0100) Field (HBUS, DWordAcc, NoLock, Preserve) { Offset (0x40), EPEN, 1, , 11, EPBR, 20, Offset (0x48), MHEN, 1, , 14, MHBR, 17, Offset (0x50), GCLK, 1, Offset (0x54), D0EN, 1, D1F2, 1, D1F1, 1, D1F0, 1, Offset (0x60), PXEN, 1, PXSZ, 2, , 23, PXBR, 6, Offset (0x68), DIEN, 1, , 11, DIBR, 20, Offset (0x70), , 20, MEBR, 12, Offset (0x80), , 4, PM0H, 2, Offset (0x81), PM1L, 2, , 2, PM1H, 2, Offset (0x82), PM2L, 2, , 2, PM2H, 2, Offset (0x83), PM3L, 2, , 2, PM3H, 2, Offset (0x84), PM4L, 2, , 2, PM4H, 2, Offset (0x85), PM5L, 2, , 2, PM5H, 2, Offset (0x86), PM6L, 2, , 2, PM6H, 2, Offset (0x87), Offset (0xA8), , 20, TUUD, 19, Offset (0xBC), , 20, TLUD, 12, Offset (0xC8), , 7, HTSE, 1 } OperationRegion (MCHT, SystemMemory, 0xFED10000, 0x1100) Name (BUF0, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, _Y00) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000CF7, // Range Maximum 0x00000000, // Translation Offset 0x00000CF8, // Length ,, , TypeStatic, DenseTranslation) IO (Decode16, 0x0CF8, // Range Minimum 0x0CF8, // Range Maximum 0x01, // Alignment 0x08, // Length ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000D00, // Range Minimum 0x0000FFFF, // Range Maximum 0x00000000, // Translation Offset 0x0000F300, // Length ,, , TypeStatic, DenseTranslation) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000A0000, // Range Minimum 0x000BFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00020000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C0000, // Range Minimum 0x000C3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y01, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C4000, // Range Minimum 0x000C7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y02, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C8000, // Range Minimum 0x000CBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y03, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000CC000, // Range Minimum 0x000CFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y04, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D0000, // Range Minimum 0x000D3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y05, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D4000, // Range Minimum 0x000D7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y06, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D8000, // Range Minimum 0x000DBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y07, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000DC000, // Range Minimum 0x000DFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y08, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E0000, // Range Minimum 0x000E3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y09, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E4000, // Range Minimum 0x000E7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0A, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E8000, // Range Minimum 0x000EBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0B, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000EC000, // Range Minimum 0x000EFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0C, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000F0000, // Range Minimum 0x000FFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00010000, // Length ,, _Y0D, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0xFEAFFFFF, // Range Maximum 0x00000000, // Translation Offset 0xFEB00000, // Length ,, _Y0E, AddressRangeMemory, TypeStatic) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { CreateWordField (BUF0, \_SB.PCI0._Y00._MAX, PBMX) // _MAX: Maximum Base Address PBMX = ((PELN >> 0x14) - 0x02) CreateWordField (BUF0, \_SB.PCI0._Y00._LEN, PBLN) // _LEN: Length PBLN = ((PELN >> 0x14) - One) If (PM1L) { CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length C0LN = Zero } If ((PM1L == One)) { CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status C0RW = Zero } If (PM1H) { CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length C4LN = Zero } If ((PM1H == One)) { CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status C4RW = Zero } If (PM2L) { CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length C8LN = Zero } If ((PM2L == One)) { CreateBitField (BUF0, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status C8RW = Zero } If (PM2H) { CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length CCLN = Zero } If ((PM2H == One)) { CreateBitField (BUF0, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status CCRW = Zero } If (PM3L) { CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length D0LN = Zero } If ((PM3L == One)) { CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status D0RW = Zero } If (PM3H) { CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length D4LN = Zero } If ((PM3H == One)) { CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status D4RW = Zero } If (PM4L) { CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length D8LN = Zero } If ((PM4L == One)) { CreateBitField (BUF0, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status D8RW = Zero } If (PM4H) { CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length DCLN = Zero } If ((PM4H == One)) { CreateBitField (BUF0, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status DCRW = Zero } If (PM5L) { CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length E0LN = Zero } If ((PM5L == One)) { CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status E0RW = Zero } If (PM5H) { CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length E4LN = Zero } If ((PM5H == One)) { CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status E4RW = Zero } If (PM6L) { CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length E8LN = Zero } If ((PM6L == One)) { CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status E8RW = Zero } If (PM6H) { CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length ECLN = Zero } If ((PM6H == One)) { CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status ECRW = Zero } If (PM0H) { CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length F0LN = Zero } If ((PM0H == One)) { CreateBitField (BUF0, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status F0RW = Zero } CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M1MN) // _MIN: Minimum Base Address CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M1MX) // _MAX: Maximum Base Address CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M1LN) // _LEN: Length M1MN = (TLUD << 0x14) M1LN = ((M1MX - M1MN) + One) Return (BUF0) /* \_SB_.PCI0.BUF0 */ } Name (GUID, ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */) Name (SUPP, Zero) Name (CTRL, Zero) Name (XCNT, Zero) Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { Local0 = Arg3 CreateDWordField (Local0, Zero, CDW1) CreateDWordField (Local0, 0x04, CDW2) CreateDWordField (Local0, 0x08, CDW3) If (^XHC.CUID (Arg0)) { Return (^XHC.POSC (Arg1, Arg2, Arg3)) } ElseIf ((OSYS >= 0x07DC)) { If ((XCNT == Zero)) { ^XHC.XSEL () XCNT++ } } If ((Arg0 == GUID)) { SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */ CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ If ((NEXP == Zero)) { CTRL &= 0xFFFFFFF8 } If (NEXP) { If (~(CDW1 & One)) { If ((CTRL & One)) { NHPG () } If ((CTRL & 0x04)) { NPME () } } } CTRL = Zero If ((Arg1 != One)) { CDW1 |= 0x08 } If ((CDW3 != CTRL)) { CDW1 |= 0x10 } CDW3 = CTRL /* \_SB_.PCI0.CTRL */ OSCC = CTRL /* \_SB_.PCI0.CTRL */ Return (Local0) } Else { CDW1 |= 0x04 Return (Local0) } } Scope (\_SB.PCI0) { Method (AR00, 0, NotSerialized) { Return (^^AR00) /* \_SB_.AR00 */ } Method (PR00, 0, NotSerialized) { Return (^^PR00) /* \_SB_.PR00 */ } Method (AR02, 0, NotSerialized) { Return (^^AR02) /* \_SB_.AR02 */ } Method (PR02, 0, NotSerialized) { Return (^^PR02) /* \_SB_.PR02 */ } Method (AR04, 0, NotSerialized) { Return (^^AR04) /* \_SB_.AR04 */ } Method (PR04, 0, NotSerialized) { Return (^^PR04) /* \_SB_.PR04 */ } Method (AR05, 0, NotSerialized) { Return (^^AR05) /* \_SB_.AR05 */ } Method (PR05, 0, NotSerialized) { Return (^^PR05) /* \_SB_.PR05 */ } Method (AR06, 0, NotSerialized) { Return (^^AR06) /* \_SB_.AR06 */ } Method (PR06, 0, NotSerialized) { Return (^^PR06) /* \_SB_.PR06 */ } Method (AR08, 0, NotSerialized) { Return (^^AR08) /* \_SB_.AR08 */ } Method (PR08, 0, NotSerialized) { Return (^^PR08) /* \_SB_.PR08 */ } Method (AR0A, 0, NotSerialized) { Return (^^AR0A) /* \_SB_.AR0A */ } Method (PR0A, 0, NotSerialized) { Return (^^PR0A) /* \_SB_.PR0A */ } Method (AR0B, 0, NotSerialized) { Return (^^AR0B) /* \_SB_.AR0B */ } Method (PR0B, 0, NotSerialized) { Return (^^PR0B) /* \_SB_.PR0B */ } } Device (TPMX) { Name (_HID, EisaId ("PNP0C01") /* System Board */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (CRS, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xFED40000, // Address Base 0x00005000, // Address Length ) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Return (CRS) /* \_SB_.PCI0.TPMX.CRS_ */ } Method (_STA, 0, NotSerialized) // _STA: Status { If (TPMF) { Return (Zero) } Return (0x0F) } } Device (LPCB) { Name (_ADR, 0x001F0000) // _ADR: Address Scope (\_SB) { OperationRegion (PCI0.LPCB.LPC1, PCI_Config, Zero, 0x0100) Field (PCI0.LPCB.LPC1, AnyAcc, NoLock, Preserve) { Offset (0x02), CDID, 16, Offset (0x08), CRID, 8, Offset (0x60), PARC, 8, PBRC, 8, PCRC, 8, PDRC, 8, Offset (0x68), PERC, 8, PFRC, 8, PGRC, 8, PHRC, 8, Offset (0xAC), Offset (0xAD), Offset (0xAE), XUSB, 1 } Device (LNKA) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PARC |= 0x80 } Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings { Return (PRSA) /* \_SB_.PRSA */ } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLA, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PARC & 0x0F)) Return (RTLA) /* \_SB_.LNKA._CRS.RTLA */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PARC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If ((PARC & 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKB) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PBRC |= 0x80 } Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings { Return (PRSB) /* \_SB_.PRSB */ } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLB, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLB, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PBRC & 0x0F)) Return (RTLB) /* \_SB_.LNKB._CRS.RTLB */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PBRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If ((PBRC & 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKC) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x03) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PCRC |= 0x80 } Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings { Return (PRSC) /* \_SB_.PRSC */ } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLC, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLC, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PCRC & 0x0F)) Return (RTLC) /* \_SB_.LNKC._CRS.RTLC */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PCRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If ((PCRC & 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKD) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x04) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PDRC |= 0x80 } Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings { Return (PRSD) /* \_SB_.PRSD */ } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLD, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLD, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PDRC & 0x0F)) Return (RTLD) /* \_SB_.LNKD._CRS.RTLD */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PDRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If ((PDRC & 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKE) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x05) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PERC |= 0x80 } Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings { Return (PRSE) /* \_SB_.PRSE */ } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLE, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLE, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PERC & 0x0F)) Return (RTLE) /* \_SB_.LNKE._CRS.RTLE */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PERC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If ((PERC & 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKF) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x06) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PFRC |= 0x80 } Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings { Return (PRSF) /* \_SB_.PRSF */ } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLF, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLF, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PFRC & 0x0F)) Return (RTLF) /* \_SB_.LNKF._CRS.RTLF */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PFRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If ((PFRC & 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKG) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x07) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PGRC |= 0x80 } Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings { Return (PRSG) /* \_SB_.PRSG */ } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLG, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLG, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PGRC & 0x0F)) Return (RTLG) /* \_SB_.LNKG._CRS.RTLG */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PGRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If ((PGRC & 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKH) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x08) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { PHRC |= 0x80 } Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings { Return (PRSH) /* \_SB_.PRSH */ } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLH, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLH, One, IRQ0) IRQ0 = Zero IRQ0 = (One << (PHRC & 0x0F)) Return (RTLH) /* \_SB_.LNKH._CRS.RTLH */ } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Local0-- PHRC = Local0 } Method (_STA, 0, Serialized) // _STA: Status { If ((PHRC & 0x80)) { Return (0x09) } Else { Return (0x0B) } } } } OperationRegion (LPC0, PCI_Config, 0x40, 0xC0) Field (LPC0, AnyAcc, NoLock, Preserve) { Offset (0x40), IOD0, 8, IOD1, 8, Offset (0x78), , 6, GR03, 2, Offset (0x7A), GR08, 2, GR09, 2, GR0A, 2, GR0B, 2, Offset (0x7C), , 2, GR19, 2, Offset (0x80), Offset (0xB0), RAEN, 1, , 13, RCBA, 18 } Device (DMAC) { Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x01, // Alignment 0x11, // Length ) IO (Decode16, 0x0093, // Range Minimum 0x0093, // Range Maximum 0x01, // Alignment 0x0D, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x01, // Alignment 0x20, // Length ) DMA (Compatibility, NotBusMaster, Transfer8_16, ) {4} }) } Device (FWHD) { Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) }) } Device (HPET) { Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED00000, // Address Base 0x00000400, // Address Length _Y0F) }) Method (_STA, 0, NotSerialized) // _STA: Status { If ((OSYS >= 0x07D1)) { If (HPAE) { Return (0x0F) } } ElseIf (HPAE) { Return (0x0B) } Return (Zero) } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { If (HPAE) { CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y0F._BAS, HPT0) // _BAS: Base Address If ((HPAS == One)) { HPT0 = 0xFED01000 } If ((HPAS == 0x02)) { HPT0 = 0xFED02000 } If ((HPAS == 0x03)) { HPT0 = 0xFED03000 } } Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */ } } Device (IPIC) { Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0024, // Range Minimum 0x0024, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0028, // Range Minimum 0x0028, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x002C, // Range Minimum 0x002C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0030, // Range Minimum 0x0030, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0034, // Range Minimum 0x0034, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0038, // Range Minimum 0x0038, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x003C, // Range Minimum 0x003C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A4, // Range Minimum 0x00A4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A8, // Range Minimum 0x00A8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00AC, // Range Minimum 0x00AC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B0, // Range Minimum 0x00B0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B4, // Range Minimum 0x00B4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B8, // Range Minimum 0x00B8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00BC, // Range Minimum 0x00BC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IRQNoFlags () {2} }) } Device (MATH) { Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {13} }) Method (_STA, 0, NotSerialized) // _STA: Status { If (((CDID & 0xF000) == 0x8000)) { Return (0x1F) } Else { Return (Zero) } } } Device (LDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (BUF0, ResourceTemplate () { IO (Decode16, 0x002E, // Range Minimum 0x002E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x004E, // Range Minimum 0x004E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0063, // Range Minimum 0x0063, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0067, // Range Minimum 0x0067, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0092, // Range Minimum 0x0092, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x00B2, // Range Minimum 0x00B2, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0680, // Range Minimum 0x0680, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0xFFFF, // Range Minimum 0xFFFF, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0xFFFF, // Range Minimum 0xFFFF, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0xFFFF, // Range Minimum 0xFFFF, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0800, // Range Minimum 0x0800, // Range Maximum 0x01, // Alignment 0xFF, // Length _Y10) IO (Decode16, 0x0900, // Range Minimum 0x0900, // Range Maximum 0x01, // Alignment 0xFF, // Length _Y11) IO (Decode16, 0x0A00, // Range Minimum 0x0A00, // Range Maximum 0x01, // Alignment 0xFF, // Length _Y12) IO (Decode16, 0x0B00, // Range Minimum 0x0B00, // Range Maximum 0x01, // Alignment 0xFF, // Length _Y13) IO (Decode16, 0x1800, // Range Minimum 0x1800, // Range Maximum 0x01, // Alignment 0xFF, // Length ) IO (Decode16, 0x164E, // Range Minimum 0x164E, // Range Maximum 0x01, // Alignment 0x02, // Length ) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { CreateWordField (BUF0, \_SB.PCI0.LPCB.LDRC._Y10._MIN, IO0M) // _MIN: Minimum Base Address CreateWordField (BUF0, \_SB.PCI0.LPCB.LDRC._Y10._MAX, IO0X) // _MAX: Maximum Base Address IO0M = GPBS /* \GPBS */ IO0X = GPBS /* \GPBS */ CreateWordField (BUF0, \_SB.PCI0.LPCB.LDRC._Y11._MIN, IO1M) // _MIN: Minimum Base Address CreateWordField (BUF0, \_SB.PCI0.LPCB.LDRC._Y11._MAX, IO1X) // _MAX: Maximum Base Address IO1M = (GPBS + 0x0100) IO1X = (GPBS + 0x0100) CreateWordField (BUF0, \_SB.PCI0.LPCB.LDRC._Y12._MIN, IO2M) // _MIN: Minimum Base Address CreateWordField (BUF0, \_SB.PCI0.LPCB.LDRC._Y12._MAX, IO2X) // _MAX: Maximum Base Address IO2M = (GPBS + 0x0200) IO2X = (GPBS + 0x0200) CreateWordField (BUF0, \_SB.PCI0.LPCB.LDRC._Y13._MIN, IO3M) // _MIN: Minimum Base Address CreateWordField (BUF0, \_SB.PCI0.LPCB.LDRC._Y13._MAX, IO3X) // _MAX: Maximum Base Address IO3M = (GPBS + 0x0300) IO3X = (GPBS + 0x0300) Return (BUF0) /* \_SB_.PCI0.LPCB.LDRC.BUF0 */ } } Device (RTC) { Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {8} }) } Device (TIMR) { Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x0050, // Range Minimum 0x0050, // Range Maximum 0x10, // Alignment 0x04, // Length ) IRQNoFlags () {0} }) } Device (CWDT) { Name (_HID, EisaId ("INT3F0D") /* ACPI Motherboard Resources */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _CID: Compatible ID Name (BUF0, ResourceTemplate () { IO (Decode16, 0x1854, // Range Minimum 0x1854, // Range Maximum 0x04, // Alignment 0x04, // Length ) }) Method (_STA, 0, Serialized) // _STA: Status { If ((WDTE == One)) { Return (0x0F) } Else { Return (Zero) } } Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Return (BUF0) /* \_SB_.PCI0.LPCB.CWDT.BUF0 */ } } Device (SIO1) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, 0x0111) // _UID: Unique ID Name (CRS, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y14) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y15) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y16) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y17) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { If (((SP1O < 0x03F0) && (SP1O > 0xF0))) { CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y14._MIN, GPI0) // _MIN: Minimum Base Address CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y14._MAX, GPI1) // _MAX: Maximum Base Address CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y14._LEN, GPIL) // _LEN: Length GPI0 = SP1O /* \SP1O */ GPI1 = SP1O /* \SP1O */ GPIL = 0x02 } If (IO1B) { CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y15._MIN, GP10) // _MIN: Minimum Base Address CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y15._MAX, GP11) // _MAX: Maximum Base Address CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y15._LEN, GPL1) // _LEN: Length GP10 = IO1B /* \IO1B */ GP11 = IO1B /* \IO1B */ GPL1 = IO1L /* \IO1L */ } If (IOEM) { CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y16._MIN, GP20) // _MIN: Minimum Base Address CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y16._MAX, GP21) // _MAX: Maximum Base Address CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y16._LEN, GPL2) // _LEN: Length GP20 = IOEM /* \IOEM */ GP21 = IOEM /* \IOEM */ GPL2 = IOEL /* \IOEL */ } ENFG (0x11) If (ACTR) { CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y17._MIN, GP30) // _MIN: Minimum Base Address CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y17._MAX, GP31) // _MAX: Maximum Base Address CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y17._LEN, GPL3) // _LEN: Length SLDN (0x0C) Local0 = (CR83 << 0x08) Local0 |= CR82 Local1 = (FindSetRightBit (Local0) - One) Local1 = (One << Local1) SLDN (0x11) If ((OPT0 & 0x02)){} Else { GP30 = (Local0 | 0x0400) GP31 = (Local0 | 0x0400) GPL3 = Local1 } } EXFG () Return (CRS) /* \_SB_.PCI0.LPCB.SIO1.CRS_ */ } Name (DCAT, Package (0x15) { 0x07, 0x08, 0x11, 0x0B, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, One, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }) Mutex (MUT0, 0x00) Method (ENFG, 1, NotSerialized) { Acquire (MUT0, 0x0FFF) INDX = 0x55 LDN = Arg0 } Method (EXFG, 0, NotSerialized) { INDX = 0xAA Release (MUT0) } Method (LPTM, 0, NotSerialized) { ENFG (CGLD (0x02)) Local0 = (OPT0 & 0x02) EXFG () Return (Local0) } Method (UHID, 1, NotSerialized) { Return (0x0105D041) } Method (SLDN, 1, NotSerialized) { LDN = Arg0 } OperationRegion (IOID, SystemIO, SP1O, 0x02) Field (IOID, ByteAcc, NoLock, Preserve) { INDX, 8, DATA, 8 } IndexField (INDX, DATA, ByteAcc, NoLock, Preserve) { Offset (0x07), LDN, 8, Offset (0x30), ACTR, 8, Offset (0x41), CR41, 8, Offset (0x43), CR43, 8, CR44, 8, CR45, 8, CR46, 8, CR47, 8, Offset (0x4C), CR4C, 8, Offset (0x53), CR53, 8, Offset (0x55), CR55, 8, Offset (0x57), CR57, 8, Offset (0x61), CR61, 8, CR62, 8, CR63, 8, Offset (0x65), CR65, 8, CR66, 8, CR67, 8, Offset (0x69), CR69, 8, CR6A, 8, CR6B, 8, Offset (0x6D), CR6D, 8, CR6E, 8, CR6F, 8, Offset (0x71), CR71, 8, CR72, 8, CR73, 8, Offset (0x79), CR79, 8, CR7A, 8, CR7B, 8, Offset (0x7D), CR7D, 8, CR7E, 8, CR7F, 8, Offset (0x81), CR81, 8, CR82, 8, CR83, 8, Offset (0xF0), OPT0, 8 } OperationRegion (RNTR, SystemIO, IO1B, IO1L) Field (RNTR, ByteAcc, NoLock, Preserve) { PMES, 1, Offset (0x01), PMEN, 1, Offset (0x02), PMS1, 8, PMS2, 8, PMS3, 8, PME1, 8, PME2, 8, PME3, 8, Offset (0x10), SOIS, 1, Offset (0x11), SOIE, 1, Offset (0x12), SST1, 8, SST2, 8, SST3, 8, SEN1, 8, SEN2, 8, SEN3, 8, Offset (0x25), LED1, 8, Offset (0x28), GPSR, 8, GPRR, 8, GPWR, 8 } Method (CGLD, 1, NotSerialized) { Return (DerefOf (DCAT [Arg0])) } Method (DSTA, 1, NotSerialized) { ENFG (CGLD (Arg0)) Local0 = ACTR /* \_SB_.PCI0.LPCB.SIO1.ACTR */ EXFG () If ((Local0 == 0xFF)) { Return (Zero) } Local0 &= One If ((Arg0 >= 0x10)) { IOES |= (Local0 << (Arg0 & 0x0F)) } Else { IOST |= (Local0 << Arg0) } If (Local0) { Return (0x0F) } Else { If ((Arg0 >= 0x10)) { Local0 = IOES /* \IOES */ } Else { Local0 = IOST /* \IOST */ } Local1 = (Arg0 & 0x0F) If (((One << Local1) & Local0)) { Return (0x0D) } Else { Return (Zero) } } } Method (DCNT, 2, NotSerialized) { ENFG (CGLD (Arg0)) ACTR = Arg1 EXFG () } Method (GIRQ, 1, NotSerialized) { SLDN (0x0C) Local0 = 0x0F While (Local0) { Local1 = (0x40 + Local0) INDX = Local1 Local1 = DATA /* \_SB_.PCI0.LPCB.SIO1.DATA */ If ((CGLD (Arg0) == Local1)) { Local1 = One Local0 = (Local1 << Local0) Return (Local0) } Local0-- } Return (0xFF) } Method (GDMA, 1, NotSerialized) { SLDN (0x0C) Local0 = 0x03 While (Local0) { Local1 = (Local0 << One) Local1 += 0x51 INDX = Local1 Local1 = DATA /* \_SB_.PCI0.LPCB.SIO1.DATA */ If (((0x80 | CGLD (Arg0)) == Local1)) { Local1 = One Local0 = (Local1 << Local0) Return (Local0) } Local0-- } Return (0xFF) } Method (STIO, 4, NotSerialized) { SLDN (0x0C) INDX = Arg0 DATA = Arg1 Local0 = (Arg0 + One) INDX = Local0 DATA = Arg2 Local0 = (Arg2 << 0x08) Local1 = (Local0 + Arg1) RRIO (Arg3, One, Local1, 0x08) } Method (SIRQ, 2, NotSerialized) { SLDN (0x0C) FindSetRightBit (Arg1, Local0) Local0 -= One Local1 = 0x0F While (Local1) { Local2 = (0x40 + Local1) INDX = Local2 Local3 = DATA /* \_SB_.PCI0.LPCB.SIO1.DATA */ If ((CGLD (Arg0) == Local3)) { If ((Local0 != Local1)) { INDX = Local2 DATA = Zero Break } Else { Return (Zero) } } Local1-- } Local0 += 0x40 INDX = Local0 DATA = CGLD (Arg0) Return (0xFF) } Method (SDMA, 2, NotSerialized) { SLDN (0x0C) FindSetRightBit (Arg1, Local0) Local0 -= One Local1 = 0x03 While (Local1) { Local2 = (Local1 << One) Local3 = (0x51 + Local2) INDX = Local3 Local4 = DATA /* \_SB_.PCI0.LPCB.SIO1.DATA */ If (((0x80 | CGLD (Arg0)) == Local4)) { If ((Local0 != Local1)) { INDX = Local3 DATA = Zero Break } Else { Return (Zero) } } Local1-- } Local0 <<= One Local0 += 0x51 INDX = Local0 DATA = (0x80 | CGLD (Arg0)) } } Name (PMFG, Zero) Method (SIOS, 1, NotSerialized) { Debug = "SIOS" If (((Arg0 != 0x05) && (Arg0 != 0x04))) { ^SIO1.PMES = One ^SIO1.PMS1 = 0xFF If (KBFG) { ^SIO1.PME1 |= 0x08 } If (MSFG) { ^SIO1.PME1 |= 0x10 } ^SIO1.PMEN = One } } Method (SIOW, 1, NotSerialized) { Debug = "SIOW" Debug = "SIOW" PMFG = ^SIO1.PMS1 /* \_SB_.PCI0.LPCB.SIO1.PMS1 */ ^SIO1.PMEN = Zero ^SIO1.PMS1 = 0xFF ^SIO1.PMES = One } Device (UAR1) { Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (^^SIO1.DSTA (Zero)) } Method (_DIS, 0, NotSerialized) // _DIS: Disable Device { ^^SIO1.DCNT (Zero, Zero) } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { ^^SIO1.ENFG (0x0C) Name (BUF0, ResourceTemplate () { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x08, // Alignment 0x08, // Length _Y18) IRQNoFlags (_Y19) {4} }) CreateByteField (BUF0, \_SB.PCI0.LPCB.UAR1._CRS._Y18._MIN, IOLO) // _MIN: Minimum Base Address CreateByteField (BUF0, 0x03, IOHI) CreateByteField (BUF0, \_SB.PCI0.LPCB.UAR1._CRS._Y18._MAX, IORL) // _MAX: Maximum Base Address CreateByteField (BUF0, 0x05, IORH) CreateWordField (BUF0, \_SB.PCI0.LPCB.UAR1._CRS._Y19._INT, IRQL) // _INT: Interrupts Local0 = ^^SIO1.CR6A /* \_SB_.PCI0.LPCB.SIO1.CR6A */ IOLO = Local0 Local0 = ^^SIO1.CR6B /* \_SB_.PCI0.LPCB.SIO1.CR6B */ IOHI = Local0 IORL = IOLO /* \_SB_.PCI0.LPCB.UAR1._CRS.IOLO */ IORH = IOHI /* \_SB_.PCI0.LPCB.UAR1._CRS.IOHI */ IRQL = ^^SIO1.GIRQ (Zero) ^^SIO1.EXFG () Return (BUF0) /* \_SB_.PCI0.LPCB.UAR1._CRS.BUF0 */ } Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings { ^^SIO1.ENFG (0x0C) CreateByteField (Arg0, 0x02, IOLO) CreateByteField (Arg0, 0x03, IOHI) CreateWordField (Arg0, 0x09, IRQL) ^^SIO1.STIO (0x6A, IOLO, IOHI, Zero) ^^SIO1.SIRQ (Zero, IRQL) ^^SIO1.EXFG () ^^SIO1.DCNT (Zero, One) } Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {4} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,9,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x02F8, // Range Minimum 0x02F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,9,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03E8, // Range Minimum 0x03E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,9,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x02E8, // Range Minimum 0x02E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,9,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } EndDependentFn () }) } Device (RMSC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, 0x10) // _UID: Unique ID Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0010, // Range Minimum 0x0010, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x0022, // Range Minimum 0x0022, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x0044, // Range Minimum 0x0044, // Range Maximum 0x00, // Alignment 0x1C, // Length ) IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x00, // Alignment 0x0B, // Length ) IO (Decode16, 0x0072, // Range Minimum 0x0072, // Range Maximum 0x00, // Alignment 0x0E, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0084, // Range Minimum 0x0084, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0088, // Range Minimum 0x0088, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x008C, // Range Minimum 0x008C, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0090, // Range Minimum 0x0090, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x00A2, // Range Minimum 0x00A2, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x00E0, // Range Minimum 0x00E0, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x00, // Alignment 0x02, // Length ) }) Name (CRS2, ResourceTemplate () { IO (Decode16, 0x0010, // Range Minimum 0x0010, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x0022, // Range Minimum 0x0022, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x0044, // Range Minimum 0x0044, // Range Maximum 0x00, // Alignment 0x1C, // Length ) IO (Decode16, 0x0072, // Range Minimum 0x0072, // Range Maximum 0x00, // Alignment 0x0E, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0084, // Range Minimum 0x0084, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0088, // Range Minimum 0x0088, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x008C, // Range Minimum 0x008C, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0090, // Range Minimum 0x0090, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x00A2, // Range Minimum 0x00A2, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x00E0, // Range Minimum 0x00E0, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x00, // Alignment 0x02, // Length ) }) Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { If ((MBEC & 0xFFFF)) { Return (CRS1) /* \_SB_.PCI0.LPCB.RMSC.CRS1 */ } Else { Return (CRS2) /* \_SB_.PCI0.LPCB.RMSC.CRS2 */ } } } } Device (P0PB) { Name (_ADR, 0x00010002) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR0B ()) } Return (PR0B ()) } } Device (B0D4) { Name (_ADR, 0x00040000) // _ADR: Address } Device (HEC1) { Name (_ADR, 0x00160000) // _ADR: Address Name (H1BR, 0xDEADBEEF) Name (H1ST, 0x0B) OperationRegion (HCSR, SystemMemory, H1BR, 0x10) Field (HCSR, DWordAcc, NoLock, Preserve) { CBWW, 32, HIE, 1, HIS, 1, HIG, 1, HRD, 1, HRS, 1, Offset (0x05), HRP, 8, HWP, 8, HBD, 8, CBRW, 32, MIE, 1, MIS, 1, MIG, 1, MRD, 1, MRS, 1, Offset (0x0D), MRP, 8, MWP, 8, MBD, 8 } OperationRegion (MFS1, PCI_Config, 0x40, 0x04) Field (MFS1, DWordAcc, NoLock, Preserve) { MECS, 4, RVD, 28 } Method (_INI, 0, Serialized) // _INI: Initialize { WAK () } Method (_STA, 0, NotSerialized) // _STA: Status { If ((MECS != 0x05)) { Return (0x09) } Else { Return (H1ST) /* \_SB_.PCI0.HEC1.H1ST */ } } Method (WAK, 0, Serialized) { Return (One) } Method (PTS, 0, Serialized) { Return (One) } OperationRegion (TCOS, SystemIO, 0x0464, 0x02) Field (TCOS, ByteAcc, NoLock, WriteAsZeros) { Offset (0x01), , 1, DSCI, 1 } Scope (^^PCI0) { Device (MERC) { Name (_HID, EisaId ("PNP0C01") /* System Board */) // _HID: Hardware ID Name (_UID, 0x0815) // _UID: Unique ID Name (H1BG, 0x12345678) Name (H2BG, 0x87654321) Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000010, // Address Length _Y1A) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000010, // Address Length _Y1B) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { CreateDWordField (BUF0, \_SB.PCI0.MERC._Y1A._BAS, H1BA) // _BAS: Base Address H1BA = H1BG /* \_SB_.PCI0.MERC.H1BG */ CreateDWordField (BUF0, \_SB.PCI0.MERC._Y1B._BAS, H2BA) // _BAS: Base Address H2BA = H2BG /* \_SB_.PCI0.MERC.H2BG */ Return (BUF0) /* \_SB_.PCI0.MERC.BUF0 */ } Method (_STA, 0, NotSerialized) // _STA: Status { If ((^^HEC1.H1ST == Zero)) { Return (0x0F) } Else { Return (Zero) } } } } } Device (P0P2) { Name (_ADR, 0x00010000) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR02 ()) } Return (PR02 ()) } Device (PEGP) { Name (_ADR, 0xFFFF) // _ADR: Address } } Device (P0PA) { Name (_ADR, 0x00010001) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR0A ()) } Return (PR0A ()) } } Device (HEC2) { Name (_ADR, 0x00160001) // _ADR: Address } Device (RP01) { Name (_ADR, 0x001C0000) // _ADR: Address OperationRegion (PXCS, PCI_Config, Zero, 0x0380) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x19), SCBN, 8, Offset (0x50), L0SE, 1, , 3, LDIS, 1, Offset (0x51), Offset (0x52), , 13, LASX, 1, Offset (0x54), , 6, HPCE, 1, , 12, PSN, 8, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PSPX, 1, PMEP, 1, Offset (0xA4), D3HT, 2, Offset (0xD8), , 30, HPEX, 1, PMEX, 1, Offset (0xE2), , 2, L23E, 1, L23R, 1, Offset (0x324), , 3, LEDM, 1 } Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0xDC), , 30, HPSX, 1, PMSX, 1 } Method (_STA, 0, NotSerialized) // _STA: Status { If ((VDID == 0xFFFFFFFF)) { Return (Zero) } Else { Return (0x0F) } } Name (ROW, Zero) Name (DSM7, Package (0x02) { Ones, Unicode ("Dummy") }) Name (LTRV, Package (0x04) { Zero, Zero, Zero, Zero }) Name (OPTS, Zero) Name (RPAV, Zero) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { If ((Arg1 >= 0x02)) { OPTS = Zero If (CDN) { OPTS |= 0x80 } If (LTRE) { OPTS |= 0x40 } If (OBFF) { OPTS |= 0x10 } If (OPTS) { OPTS |= One } Return (ToBuffer (OPTS)) } Else { Return (Buffer (One) { 0x00 // . }) } } Case (0x04) { If ((Arg1 == 0x02)) { If (OBFF) { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ }) } Else { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } } } Case (0x06) { If ((Arg1 == 0x02)) { If (LTRE) { If (((LMSL == 0xFFFFFFFF) || (LNSL == 0xFFFFFFFF))) { If ((PCHS == One)) { LMSL = 0x0846 LNSL = 0x0846 } ElseIf ((PCHS == 0x02)) { LMSL = 0x1003 LNSL = 0x1003 } } LTRV [Zero] = ((LMSL >> 0x0A) & 0x07) LTRV [One] = (LMSL & 0x03FF) LTRV [0x02] = ((LNSL >> 0x0A) & 0x07) LTRV [0x03] = (LNSL & 0x03FF) Return (LTRV) /* \_SB_.PCI0.RP01.LTRV */ } Else { Return (Zero) } } } Case (0x07) { If ((Arg1 >= 0x02)) { If (CDN) { ROW = Zero While ((DerefOf (DerefOf (PDSM [ROW]) [Zero]) != Ones)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [0x02]) If ((Local0 != Zero)) { If ((Local0 == PSN)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [Zero]) DSM7 [Zero] = Local0 Local0 = DerefOf (DerefOf (PDSM [ROW]) [One]) DSM7 [One] = Local0 Return (DSM7) /* \_SB_.PCI0.RP01.DSM7 */ } } Else { Local0 = DerefOf (DerefOf (PDSM [ROW]) [0x03]) If ((Local0 != Ones)) { If ((Local0 == VDID)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [Zero]) DSM7 [Zero] = Local0 Local0 = DerefOf (DerefOf (PDSM [ROW]) [One]) DSM7 [One] = Local0 Return (DSM7) /* \_SB_.PCI0.RP01.DSM7 */ } } } ROW++ } } } } } } Return (Buffer (One) { 0x00 // . }) } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (HPCE) /* \_SB_.PCI0.RP01.HPCE */ } } Method (_REG, 2, NotSerialized) // _REG: Region Availability { If (((Arg0 == 0x02) && (Arg1 == One))) { RPAV = One } } Method (HPME, 0, Serialized) { If ((PSPX || PMEP)) { Local1 = PMEX /* \_SB_.PCI0.RP01.PMEX */ PMEX = Zero Sleep (0x32) PSPX = One Sleep (0x32) If (PSPX) { PSPX = One Sleep (0x32) } PMEX = Local1 } If (PMSX) { Local0 = 0xC8 While (Local0) { PMSX = One If (PMSX) { Local0-- } Else { Local0 = Zero } } Notify (PXSX, 0x02) // Device Wake } } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR04 ()) } Return (PR04 ()) } } Device (RP02) { Name (_ADR, 0x001C0001) // _ADR: Address OperationRegion (PXCS, PCI_Config, Zero, 0x0380) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x19), SCBN, 8, Offset (0x50), L0SE, 1, , 3, LDIS, 1, Offset (0x51), Offset (0x52), , 13, LASX, 1, Offset (0x54), , 6, HPCE, 1, , 12, PSN, 8, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PSPX, 1, PMEP, 1, Offset (0xA4), D3HT, 2, Offset (0xD8), , 30, HPEX, 1, PMEX, 1, Offset (0xE2), , 2, L23E, 1, L23R, 1, Offset (0x324), , 3, LEDM, 1 } Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0xDC), , 30, HPSX, 1, PMSX, 1 } Method (_STA, 0, NotSerialized) // _STA: Status { If ((VDID == 0xFFFFFFFF)) { Return (Zero) } Else { Return (0x0F) } } Name (ROW, Zero) Name (DSM7, Package (0x02) { Ones, Unicode ("Dummy") }) Name (LTRV, Package (0x04) { Zero, Zero, Zero, Zero }) Name (OPTS, Zero) Name (RPAV, Zero) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { If ((Arg1 >= 0x02)) { OPTS = Zero If (CDN) { OPTS |= 0x80 } If (LTRE) { OPTS |= 0x40 } If (OBFF) { OPTS |= 0x10 } If (OPTS) { OPTS |= One } Return (ToBuffer (OPTS)) } Else { Return (Buffer (One) { 0x00 // . }) } } Case (0x04) { If ((Arg1 == 0x02)) { If (OBFF) { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ }) } Else { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } } } Case (0x06) { If ((Arg1 == 0x02)) { If (LTRE) { If (((LMSL == 0xFFFFFFFF) || (LNSL == 0xFFFFFFFF))) { If ((PCHS == One)) { LMSL = 0x0846 LNSL = 0x0846 } ElseIf ((PCHS == 0x02)) { LMSL = 0x1003 LNSL = 0x1003 } } LTRV [Zero] = ((LMSL >> 0x0A) & 0x07) LTRV [One] = (LMSL & 0x03FF) LTRV [0x02] = ((LNSL >> 0x0A) & 0x07) LTRV [0x03] = (LNSL & 0x03FF) Return (LTRV) /* \_SB_.PCI0.RP02.LTRV */ } Else { Return (Zero) } } } Case (0x07) { If ((Arg1 >= 0x02)) { If (CDN) { ROW = Zero While ((DerefOf (DerefOf (PDSM [ROW]) [Zero]) != Ones)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [0x02]) If ((Local0 != Zero)) { If ((Local0 == PSN)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [Zero]) DSM7 [Zero] = Local0 Local0 = DerefOf (DerefOf (PDSM [ROW]) [One]) DSM7 [One] = Local0 Return (DSM7) /* \_SB_.PCI0.RP02.DSM7 */ } } Else { Local0 = DerefOf (DerefOf (PDSM [ROW]) [0x03]) If ((Local0 != Ones)) { If ((Local0 == VDID)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [Zero]) DSM7 [Zero] = Local0 Local0 = DerefOf (DerefOf (PDSM [ROW]) [One]) DSM7 [One] = Local0 Return (DSM7) /* \_SB_.PCI0.RP02.DSM7 */ } } } ROW++ } } } } } } Return (Buffer (One) { 0x00 // . }) } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (HPCE) /* \_SB_.PCI0.RP02.HPCE */ } } Method (_REG, 2, NotSerialized) // _REG: Region Availability { If (((Arg0 == 0x02) && (Arg1 == One))) { RPAV = One } } Method (HPME, 0, Serialized) { If ((PSPX || PMEP)) { Local1 = PMEX /* \_SB_.PCI0.RP02.PMEX */ PMEX = Zero Sleep (0x32) PSPX = One Sleep (0x32) If (PSPX) { PSPX = One Sleep (0x32) } PMEX = Local1 } If (PMSX) { Local0 = 0xC8 While (Local0) { PMSX = One If (PMSX) { Local0-- } Else { Local0 = Zero } } Notify (PXSX, 0x02) // Device Wake } } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR05 ()) } Return (PR05 ()) } } Device (RP03) { Name (_ADR, 0x001C0002) // _ADR: Address OperationRegion (PXCS, PCI_Config, Zero, 0x0380) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x19), SCBN, 8, Offset (0x50), L0SE, 1, , 3, LDIS, 1, Offset (0x51), Offset (0x52), , 13, LASX, 1, Offset (0x54), , 6, HPCE, 1, , 12, PSN, 8, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PSPX, 1, PMEP, 1, Offset (0xA4), D3HT, 2, Offset (0xD8), , 30, HPEX, 1, PMEX, 1, Offset (0xE2), , 2, L23E, 1, L23R, 1, Offset (0x324), , 3, LEDM, 1 } Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0xDC), , 30, HPSX, 1, PMSX, 1 } Method (_STA, 0, NotSerialized) // _STA: Status { If ((VDID == 0xFFFFFFFF)) { Return (Zero) } Else { Return (0x0F) } } Name (ROW, Zero) Name (DSM7, Package (0x02) { Ones, Unicode ("Dummy") }) Name (LTRV, Package (0x04) { Zero, Zero, Zero, Zero }) Name (OPTS, Zero) Name (RPAV, Zero) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { If ((Arg1 >= 0x02)) { OPTS = Zero If (CDN) { OPTS |= 0x80 } If (LTRE) { OPTS |= 0x40 } If (OBFF) { OPTS |= 0x10 } If (OPTS) { OPTS |= One } Return (ToBuffer (OPTS)) } Else { Return (Buffer (One) { 0x00 // . }) } } Case (0x04) { If ((Arg1 == 0x02)) { If (OBFF) { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ }) } Else { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } } } Case (0x06) { If ((Arg1 == 0x02)) { If (LTRE) { If (((LMSL == 0xFFFFFFFF) || (LNSL == 0xFFFFFFFF))) { If ((PCHS == One)) { LMSL = 0x0846 LNSL = 0x0846 } ElseIf ((PCHS == 0x02)) { LMSL = 0x1003 LNSL = 0x1003 } } LTRV [Zero] = ((LMSL >> 0x0A) & 0x07) LTRV [One] = (LMSL & 0x03FF) LTRV [0x02] = ((LNSL >> 0x0A) & 0x07) LTRV [0x03] = (LNSL & 0x03FF) Return (LTRV) /* \_SB_.PCI0.RP03.LTRV */ } Else { Return (Zero) } } } Case (0x07) { If ((Arg1 >= 0x02)) { If (CDN) { ROW = Zero While ((DerefOf (DerefOf (PDSM [ROW]) [Zero]) != Ones)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [0x02]) If ((Local0 != Zero)) { If ((Local0 == PSN)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [Zero]) DSM7 [Zero] = Local0 Local0 = DerefOf (DerefOf (PDSM [ROW]) [One]) DSM7 [One] = Local0 Return (DSM7) /* \_SB_.PCI0.RP03.DSM7 */ } } Else { Local0 = DerefOf (DerefOf (PDSM [ROW]) [0x03]) If ((Local0 != Ones)) { If ((Local0 == VDID)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [Zero]) DSM7 [Zero] = Local0 Local0 = DerefOf (DerefOf (PDSM [ROW]) [One]) DSM7 [One] = Local0 Return (DSM7) /* \_SB_.PCI0.RP03.DSM7 */ } } } ROW++ } } } } } } Return (Buffer (One) { 0x00 // . }) } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (HPCE) /* \_SB_.PCI0.RP03.HPCE */ } } Method (_REG, 2, NotSerialized) // _REG: Region Availability { If (((Arg0 == 0x02) && (Arg1 == One))) { RPAV = One } } Method (HPME, 0, Serialized) { If ((PSPX || PMEP)) { Local1 = PMEX /* \_SB_.PCI0.RP03.PMEX */ PMEX = Zero Sleep (0x32) PSPX = One Sleep (0x32) If (PSPX) { PSPX = One Sleep (0x32) } PMEX = Local1 } If (PMSX) { Local0 = 0xC8 While (Local0) { PMSX = One If (PMSX) { Local0-- } Else { Local0 = Zero } } Notify (PXSX, 0x02) // Device Wake } } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR06 ()) } Return (PR06 ()) } Device (LAN1) { Name (_ADR, Zero) // _ADR: Address } } Device (RP05) { Name (_ADR, 0x001C0004) // _ADR: Address OperationRegion (PXCS, PCI_Config, Zero, 0x0380) Field (PXCS, AnyAcc, NoLock, Preserve) { VDID, 32, Offset (0x19), SCBN, 8, Offset (0x50), L0SE, 1, , 3, LDIS, 1, Offset (0x51), Offset (0x52), , 13, LASX, 1, Offset (0x54), , 6, HPCE, 1, , 12, PSN, 8, Offset (0x5A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x5B), Offset (0x60), Offset (0x62), PSPX, 1, PMEP, 1, Offset (0xA4), D3HT, 2, Offset (0xD8), , 30, HPEX, 1, PMEX, 1, Offset (0xE2), , 2, L23E, 1, L23R, 1, Offset (0x324), , 3, LEDM, 1 } Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0xDC), , 30, HPSX, 1, PMSX, 1 } Method (_STA, 0, NotSerialized) // _STA: Status { If ((VDID == 0xFFFFFFFF)) { Return (Zero) } Else { Return (0x0F) } } Name (ROW, Zero) Name (DSM7, Package (0x02) { Ones, Unicode ("Dummy") }) Name (LTRV, Package (0x04) { Zero, Zero, Zero, Zero }) Name (OPTS, Zero) Name (RPAV, Zero) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { If ((Arg1 >= 0x02)) { OPTS = Zero If (CDN) { OPTS |= 0x80 } If (LTRE) { OPTS |= 0x40 } If (OBFF) { OPTS |= 0x10 } If (OPTS) { OPTS |= One } Return (ToBuffer (OPTS)) } Else { Return (Buffer (One) { 0x00 // . }) } } Case (0x04) { If ((Arg1 == 0x02)) { If (OBFF) { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ }) } Else { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } } } Case (0x06) { If ((Arg1 == 0x02)) { If (LTRE) { If (((LMSL == 0xFFFFFFFF) || (LNSL == 0xFFFFFFFF))) { If ((PCHS == One)) { LMSL = 0x0846 LNSL = 0x0846 } ElseIf ((PCHS == 0x02)) { LMSL = 0x1003 LNSL = 0x1003 } } LTRV [Zero] = ((LMSL >> 0x0A) & 0x07) LTRV [One] = (LMSL & 0x03FF) LTRV [0x02] = ((LNSL >> 0x0A) & 0x07) LTRV [0x03] = (LNSL & 0x03FF) Return (LTRV) /* \_SB_.PCI0.RP05.LTRV */ } Else { Return (Zero) } } } Case (0x07) { If ((Arg1 >= 0x02)) { If (CDN) { ROW = Zero While ((DerefOf (DerefOf (PDSM [ROW]) [Zero]) != Ones)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [0x02]) If ((Local0 != Zero)) { If ((Local0 == PSN)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [Zero]) DSM7 [Zero] = Local0 Local0 = DerefOf (DerefOf (PDSM [ROW]) [One]) DSM7 [One] = Local0 Return (DSM7) /* \_SB_.PCI0.RP05.DSM7 */ } } Else { Local0 = DerefOf (DerefOf (PDSM [ROW]) [0x03]) If ((Local0 != Ones)) { If ((Local0 == VDID)) { Local0 = DerefOf (DerefOf (PDSM [ROW]) [Zero]) DSM7 [Zero] = Local0 Local0 = DerefOf (DerefOf (PDSM [ROW]) [One]) DSM7 [One] = Local0 Return (DSM7) /* \_SB_.PCI0.RP05.DSM7 */ } } } ROW++ } } } } } } Return (Buffer (One) { 0x00 // . }) } Device (PXSX) { Name (_ADR, Zero) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (HPCE) /* \_SB_.PCI0.RP05.HPCE */ } } Method (_REG, 2, NotSerialized) // _REG: Region Availability { If (((Arg0 == 0x02) && (Arg1 == One))) { RPAV = One } } Method (HPME, 0, Serialized) { If ((PSPX || PMEP)) { Local1 = PMEX /* \_SB_.PCI0.RP05.PMEX */ PMEX = Zero Sleep (0x32) PSPX = One Sleep (0x32) If (PSPX) { PSPX = One Sleep (0x32) } PMEX = Local1 } If (PMSX) { Local0 = 0xC8 While (Local0) { PMSX = One If (PMSX) { Local0-- } Else { Local0 = Zero } } Notify (PXSX, 0x02) // Device Wake } } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR08 ()) } Return (PR08 ()) } } Device (LAN2) { Name (_ADR, 0x00190000) // _ADR: Address } } } Name (RPA0, 0x001C0000) Name (RPA1, 0x001C0001) Name (RPA2, 0x001C0002) Name (RPA3, 0x001C0003) Name (RPA4, 0x001C0004) Name (RPA5, 0x001C0005) Name (RPA6, 0x001C0006) Name (RPA7, 0x001C0007) Name (PCHS, 0x00000001) Name (SRMB, 0xF7FE0000) Name (PML1, 0x00000846) Name (PML2, 0x00000846) Name (PML3, 0x00000846) Name (PML4, 0x00000846) Name (PML5, 0x00000846) Name (PML6, 0x00000846) Name (PML7, 0x00000846) Name (PML8, 0x00000846) Name (PNL1, 0x00000846) Name (PNL2, 0x00000846) Name (PNL3, 0x00000846) Name (PNL4, 0x00000846) Name (PNL5, 0x00000846) Name (PNL6, 0x00000846) Name (PNL7, 0x00000846) Name (PNL8, 0x00000846) Scope (\) { OperationRegion (IO_D, SystemIO, 0x0810, 0x04) Field (IO_D, ByteAcc, NoLock, Preserve) { TRPD, 8 } OperationRegion (IO_H, SystemIO, 0x1000, 0x04) Field (IO_H, ByteAcc, NoLock, Preserve) { TRPH, 8 } OperationRegion (PMIO, SystemIO, PMBS, 0x80) Field (PMIO, ByteAcc, NoLock, Preserve) { Offset (0x28), Offset (0x2A), , 3, GPE3, 1, , 7, GPEB, 1, Offset (0x3C), , 1, UPRW, 1, Offset (0x42), , 1, GPEC, 1 } Field (PMIO, ByteAcc, NoLock, WriteAsZeros) { Offset (0x20), Offset (0x22), , 3, GPS3, 1, , 7, GPSB, 1, Offset (0x64), , 9, SCIS, 1, Offset (0x66) } OperationRegion (PMLP, SystemIO, (PMBS + 0x80), 0x20) Field (PMLP, ByteAcc, NoLock, Preserve) { Offset (0x10), Offset (0x11), GE08, 1, , 8, GE17, 1, , 27, GE45, 1, , 5, GE51, 1, Offset (0x20) } Field (PMLP, ByteAcc, NoLock, WriteAsZeros) { Offset (0x01), GS08, 1, , 8, GS17, 1, , 27, GS45, 1, , 5, GS51, 1, Offset (0x10) } OperationRegion (GPR, SystemIO, GPBS, 0x0400) Field (GPR, ByteAcc, NoLock, Preserve) { GU00, 8, GU01, 8, GU02, 8, GU03, 8, GIO0, 8, GIO1, 8, GIO2, 8, GIO3, 8, Offset (0x0C), GL00, 8, GL01, 8, GL02, 8, GP24, 1, , 2, GP27, 1, GP28, 1, Offset (0x10), Offset (0x18), GB00, 8, GB01, 8, GB02, 8, GB03, 8, Offset (0x2C), GIV0, 8, GIV1, 8, GIV2, 8, GIV3, 8, GU04, 8, GU05, 8, GU06, 8, GU07, 8, GIO4, 8, GIO5, 8, GIO6, 8, GIO7, 8, GL04, 8, GL05, 8, GL06, 8, GL07, 8, Offset (0x40), GU08, 8, GU09, 8, GU0A, 8, GU0B, 8, GIO8, 8, GIO9, 8, GIOA, 8, GIOB, 8, GL08, 8, GL09, 8, GL0A, 8, GL0B, 8 } OperationRegion (GPRL, SystemIO, GPBS, 0x40) Field (GPRL, ByteAcc, NoLock, Preserve) { Offset (0x01), GO08, 1, GO09, 1, , 3, GO13, 1, GO14, 1, , 2, GO17, 1, , 27, GO45, 1, , 5, GO51, 1, Offset (0x10), Offset (0x30), GR00, 32, GR01, 32, GR02, 32 } OperationRegion (RCRB, SystemMemory, SRCB, 0x4000) Field (RCRB, DWordAcc, Lock, Preserve) { Offset (0x1000), Offset (0x2330), AFEA, 32, AFED, 32, AFES, 16, AFER, 16, Offset (0x3000), Offset (0x331C), Offset (0x331F), PMFS, 1, Offset (0x3320), CKEN, 32, Offset (0x3404), HPAS, 2, , 5, HPAE, 1, Offset (0x3418), , 1, ADSD, 1, SATD, 1, SMBD, 1, HDAD, 1, Offset (0x341A), RP1D, 1, RP2D, 1, RP3D, 1, RP4D, 1, RP5D, 1, RP6D, 1, RP7D, 1, RP8D, 1, Offset (0x359C), UP0D, 1, UP1D, 1, UP2D, 1, UP3D, 1, UP4D, 1, UP5D, 1, UP6D, 1, UP7D, 1, UP8D, 1, UP9D, 1, UPAD, 1, UPBD, 1, UPCD, 1, UPDD, 1, , 1, Offset (0x359E) } OperationRegion (IO_P, SystemIO, 0x1000, 0x04) Field (IO_P, ByteAcc, NoLock, Preserve) { TRPF, 8 } } Scope (_SB) { Method (RDGI, 1, Serialized) { If ((Arg0 <= 0x5E)) { Local0 = ((GPBS + 0x0100) + (Arg0 * 0x08)) OperationRegion (LGPI, SystemIO, Local0, 0x04) Field (LGPI, AnyAcc, NoLock, Preserve) { , 30, TEMP, 1 } Return (TEMP) /* \_SB_.RDGI.TEMP */ } Return (Zero) } Method (RDGP, 1, Serialized) { If ((Arg0 <= 0x5E)) { Local0 = ((GPBS + 0x0100) + (Arg0 * 0x08)) OperationRegion (LGPI, SystemIO, Local0, 0x04) Field (LGPI, AnyAcc, NoLock, Preserve) { , 31, TEMP, 1 } Return (TEMP) /* \_SB_.RDGP.TEMP */ } Return (Zero) } Method (WTGP, 2, Serialized) { If ((Arg0 <= 0x5E)) { Local0 = ((GPBS + 0x0100) + (Arg0 * 0x08)) OperationRegion (LGPI, SystemIO, Local0, 0x04) Field (LGPI, AnyAcc, NoLock, Preserve) { , 31, TEMP, 1 } TEMP = Arg1 } } Method (WTIN, 2, Serialized) { If ((Arg0 <= 0x5E)) { Local0 = ((GPBS + 0x0100) + (Arg0 * 0x08)) OperationRegion (LGPI, SystemIO, Local0, 0x04) Field (LGPI, ByteAcc, NoLock, Preserve) { , 3, TEMP, 1 } TEMP = Arg1 } } Method (WPGP, 2, Serialized) { If ((Arg0 <= 0x5E)) { Local0 = ((GPBS + 0x0104) + (Arg0 * 0x08)) OperationRegion (LGPI, SystemIO, Local0, 0x04) Field (LGPI, AnyAcc, NoLock, Preserve) { TEMP, 2 } TEMP = Arg1 } } Method (GP2N, 2, Serialized) { If ((Arg0 <= 0x5E)) { Local0 = ((GPBS + 0x0100) + (Arg0 * 0x08)) OperationRegion (LGPI, SystemIO, Local0, 0x04) Field (LGPI, AnyAcc, NoLock, Preserve) { TEMP, 1 } TEMP = Arg1 } } Method (GP2A, 2, Serialized) { If ((Arg0 <= 0x5E)) { Local0 = ((GPBS + 0x0104) + (Arg0 * 0x08)) OperationRegion (LGP2, SystemIO, Local0, 0x04) Field (LGP2, AnyAcc, NoLock, Preserve) { GPWP, 2, GPIS, 1 } If ((Arg1 == One)) { GPIS = Zero GPWP = Zero } Else { GPWP = 0x02 GPIS = One } Local0 = (GPBS + 0x10) OperationRegion (LGPI, SystemIO, Local0, 0x02) Field (LGPI, AnyAcc, NoLock, Preserve) { TEMP, 16 } If ((Arg0 >= 0x2D)) { Local1 = (Arg0 - 0x28) } ElseIf ((Arg0 <= 0x0A)) { Local1 = (Arg0 - 0x08) } Else { Local1 = (Arg0 - 0x0A) } Local2 = (One << Local1) If (Arg1) { TEMP |= Local2 } Else { TEMP &= ~Local2 } } } Method (GP2B, 2, Serialized) { If ((Arg0 <= 0x5E)) { Local0 = (GPBS + 0x10) OperationRegion (LGPI, SystemIO, Local0, 0x02) Field (LGPI, AnyAcc, NoLock, Preserve) { TEMP, 16 } If ((Arg0 >= 0x2D)) { Local1 = (Arg0 - 0x28) } ElseIf ((Arg0 <= 0x0A)) { Local1 = (Arg0 - 0x08) } Else { Local1 = (Arg0 - 0x0A) } Local2 = (One << Local1) If (Arg1) { TEMP |= Local2 } Else { TEMP &= ~Local2 } } } } Scope (_SB.PCI0) { Name (LTRE, Zero) Name (OBFF, Zero) Name (LMSL, Zero) Name (LNSL, Zero) Device (GLAN) { Name (_ADR, 0x00190000) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0D, 0x04)) } } Device (EHC1) { Name (_ADR, 0x001D0000) // _ADR: Address OperationRegion (PWKE, PCI_Config, 0x54, 0x12) Field (PWKE, DWordAcc, NoLock, Preserve) { Offset (0x01), PMEE, 1, , 6, PMES, 1, Offset (0x0E), , 1, PWUC, 8 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { PWUC = Ones } Else { PWUC = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PR01) { Name (_ADR, One) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCA, Package (0x04) { 0xFF, Zero, Zero, Zero }) Return (UPCA) /* \_SB_.PCI0.EHC1.HUBN.PR01._UPC.UPCA */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 0....... } }) Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01._PLD.PLDP */ } Device (PR11) { Name (_ADR, One) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U1U1) /* \U1U1 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U1P1) /* \U1P1 */ } } Device (PR12) { Name (_ADR, 0x02) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U1U2) /* \U1U2 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U1P2) /* \U1P2 */ } } Device (PR13) { Name (_ADR, 0x03) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U1U3) /* \U1U3 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U1P3) /* \U1P3 */ } } Device (PR14) { Name (_ADR, 0x04) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U1U4) /* \U1U4 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U1P4) /* \U1P4 */ } } Device (PR15) { Name (_ADR, 0x05) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U1U5) /* \U1U5 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U1P5) /* \U1P5 */ } } Device (PR16) { Name (_ADR, 0x06) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U1U6) /* \U1U6 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U1P6) /* \U1P6 */ } } Device (PR17) { Name (_ADR, 0x07) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U1U7) /* \U1U7 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U1P7) /* \U1P7 */ } } Device (PR18) { Name (_ADR, 0x08) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U1U8) /* \U1U8 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U1P8) /* \U1P8 */ } } } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0D, 0x04)) } } Device (EHC2) { Name (_ADR, 0x001A0000) // _ADR: Address OperationRegion (PWKE, PCI_Config, 0x54, 0x12) Field (PWKE, DWordAcc, NoLock, Preserve) { Offset (0x01), PMEE, 1, , 6, PMES, 1, Offset (0x0E), , 1, PWUC, 6 } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { PWUC = Ones } Else { PWUC = Zero } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (HUBN) { Name (_ADR, Zero) // _ADR: Address Device (PR01) { Name (_ADR, One) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCA, Package (0x04) { 0xFF, Zero, Zero, Zero }) Return (UPCA) /* \_SB_.PCI0.EHC2.HUBN.PR01._UPC.UPCA */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // 0....... } }) Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01._PLD.PLDP */ } Device (PR11) { Name (_ADR, One) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U2U1) /* \U2U1 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U2P1) /* \U2P1 */ } } Device (PR12) { Name (_ADR, 0x02) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U2U2) /* \U2U2 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U2P2) /* \U2P2 */ } } Device (PR13) { Name (_ADR, 0x03) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U2U3) /* \U2U3 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U2P3) /* \U2P3 */ } } Device (PR14) { Name (_ADR, 0x04) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U2U4) /* \U2U4 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U2P4) /* \U2P4 */ } } Device (PR15) { Name (_ADR, 0x05) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U2U5) /* \U2U5 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U2P5) /* \U2P5 */ } } Device (PR16) { Name (_ADR, 0x06) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (U2U6) /* \U2U6 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (U2P6) /* \U2P6 */ } } } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0D, 0x04)) } } Device (XHC) { Name (_ADR, 0x00140000) // _ADR: Address Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { If ((S0ID == One)) { Return (Package (0x01) { PEPD }) } Else { Return (Package (0x00){}) } } OperationRegion (XPRT, PCI_Config, Zero, 0x0100) Field (XPRT, AnyAcc, NoLock, Preserve) { DVID, 16, Offset (0x40), , 11, SWAI, 1, Offset (0x44), , 12, SAIP, 2, Offset (0x48), Offset (0x74), D0D3, 2, Offset (0x75), PMEE, 1, , 6, PMES, 1, Offset (0xB0), , 13, MB13, 1, MB14, 1, Offset (0xB4), Offset (0xD0), PR2, 32, PR2M, 32, PR3, 32, PR3M, 32 } OperationRegion (XHCP, SystemMemory, (PEBS + 0x000A0000), 0x0100) Field (XHCP, AnyAcc, Lock, Preserve) { Offset (0x04), PDBM, 16, Offset (0x10), MEMB, 64 } Method (PR2S, 1, Serialized) { If (((CDID & 0xF000) == 0x8000)) { Switch (Arg0) { Case (One) { Return (One) } Case (0x02) { Return (0x02) } Case (0x03) { Return (0x04) } Case (0x04) { Return (0x08) } Case (0x05) { Return (0x0100) } Case (0x06) { Return (0x0200) } Case (0x07) { Return (0x0400) } Case (0x08) { Return (0x0800) } Case (0x09) { Return (0x10) } Case (0x0A) { Return (0x20) } Case (0x0B) { Return (0x1000) } Case (0x0C) { Return (0x2000) } Case (0x0D) { Return (0x40) } Case (0x0E) { Return (0x80) } Case (0x0F) { Return (0x4000) } } } Else { Switch (Arg0) { Case (One) { Return (One) } Case (0x02) { Return (0x02) } Case (0x03) { Return (0x04) } Case (0x04) { Return (0x08) } Case (0x05) { Return (0x10) } Case (0x06) { Return (0x20) } Case (0x07) { Return (0x40) } Case (0x08) { Return (0x80) } Case (0x09) { Return (0x0100) } } } } Name (XRST, Zero) Method (_PS0, 0, Serialized) // _PS0: Power State 0 { If ((DVID == 0xFFFF)) { Return (Zero) } Local2 = MEMB /* \_SB_.PCI0.XHC_.MEMB */ Local1 = PDBM /* \_SB_.PCI0.XHC_.PDBM */ PDBM &= 0xFFFFFFFFFFFFFFF9 Local3 = D0D3 /* \_SB_.PCI0.XHC_.D0D3 */ D0D3 = Zero MEMB = SRMB /* \SRMB */ PDBM = (Local1 | 0x02) OperationRegion (MCA1, SystemMemory, SRMB, 0x9000) Field (MCA1, DWordAcc, Lock, Preserve) { Offset (0x510), PSC1, 32, Offset (0x520), PSC2, 32, Offset (0x530), PSC3, 32, Offset (0x540), PSC4, 32, Offset (0x80E0), , 15, AX15, 1, Offset (0x8154), , 31, CLK2, 1, Offset (0x816C), , 2, CLK0, 1, , 11, CLK1, 1 } If ((PCHS == 0x02)) { MB13 = Zero MB14 = Zero CLK0 = Zero CLK1 = Zero } CLK2 = One If ((PCHS == 0x02)) { While (((((PSC1 & 0x03F8) == 0x02E0) || ((PSC2 & 0x03F8) == 0x02E0)) || (((PSC3 & 0x03F8) == 0x02E0) || ((PSC4 & 0x03F8) == 0x02E0)))) { Stall (0x0A) } Local4 = Zero Local0 = (PSC1 & 0xFFFFFFFFFFFFFFFD) If (((Local0 & 0x000203F9) == 0x02A0)) { PSC1 = (Local0 | 0x80000000) Local4 |= One } Local0 = (PSC2 & 0xFFFFFFFFFFFFFFFD) If (((Local0 & 0x000203F9) == 0x02A0)) { PSC2 = (Local0 | 0x80000000) Local4 |= 0x02 } Local0 = (PSC3 & 0xFFFFFFFFFFFFFFFD) If (((Local0 & 0x000203F9) == 0x02A0)) { PSC3 = (Local0 | 0x80000000) Local4 |= 0x04 } Local0 = (PSC4 & 0xFFFFFFFFFFFFFFFD) If (((Local0 & 0x000203F9) == 0x02A0)) { PSC4 = (Local0 | 0x80000000) Local4 |= 0x08 } If (Local4) { Sleep (0x65) If ((Local4 & One)) { Local0 = (PSC1 & 0xFFFFFFFFFFFFFFFD) PSC1 = (Local0 | 0x00FE0000) } If ((Local4 & 0x02)) { Local0 = (PSC2 & 0xFFFFFFFFFFFFFFFD) PSC2 = (Local0 | 0x00FE0000) } If ((Local4 & 0x04)) { Local0 = (PSC3 & 0xFFFFFFFFFFFFFFFD) PSC3 = (Local0 | 0x00FE0000) } If ((Local4 & 0x08)) { Local0 = (PSC4 & 0xFFFFFFFFFFFFFFFD) PSC4 = (Local0 | 0x00FE0000) } } AX15 = One } SWAI = Zero SAIP = Zero If (CondRefOf (\_SB.PCI0.XHC.PS0X)) { PS0X () } PDBM &= 0xFFFFFFFFFFFFFFFD MEMB = Local2 PDBM = Local1 } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { If ((DVID == 0xFFFF)) { Return (Zero) } PMES = One PMEE = One Local2 = MEMB /* \_SB_.PCI0.XHC_.MEMB */ Local1 = PDBM /* \_SB_.PCI0.XHC_.PDBM */ PDBM &= 0xFFFFFFFFFFFFFFF9 MEMB = SRMB /* \SRMB */ PDBM |= 0x02 OperationRegion (MCA1, SystemMemory, SRMB, 0x9000) Field (MCA1, DWordAcc, Lock, Preserve) { Offset (0x80E0), , 15, AX15, 1, Offset (0x8154), , 31, CLK2, 1, Offset (0x816C), , 2, CLK0, 1, , 11, CLK1, 1, Offset (0x8170) } Local3 = D0D3 /* \_SB_.PCI0.XHC_.D0D3 */ If ((Local3 == 0x03)) { D0D3 = Zero } If ((PCHS == 0x02)) { MB13 = One MB14 = One CLK0 = One CLK1 = One } CLK2 = Zero If ((PCHS == 0x02)) { AX15 = Zero } SWAI = One SAIP = One If (CondRefOf (\_SB.PCI0.XHC.PS3X)) { PS3X () } If ((Local3 == 0x03)) { D0D3 = 0x03 } PDBM &= 0xFFFFFFFFFFFFFFFD MEMB = Local2 PDBM = Local1 } Method (CUID, 1, Serialized) { If ((Arg0 == ToUUID ("7c9512a9-1705-4cb4-af7d-506a2423ab71"))) { Return (One) } Return (Zero) } Method (POSC, 3, Serialized) { CreateDWordField (Arg2, Zero, CDW1) CreateDWordField (Arg2, 0x08, CDW3) If ((XHCI == Zero)) { CDW1 |= 0x02 } If (!(CDW1 & One)) { If ((CDW3 & One)) { ESEL () } ElseIf (((CDID & 0xF000) == 0x8000)) { If ((Arg0 > One)) { XSEL () } Else { CDW1 |= 0x0A } } ElseIf ((Arg0 > 0x02)) { XSEL () } Else { CDW1 |= 0x0A } } Return (Arg2) } Method (XSEL, 0, Serialized) { If (((XHCI == 0x02) || (XHCI == 0x03))) { XUSB = One XRST = One Local0 = Zero Local0 = (PR3 & 0xFFFFFFC0) PR3 = (Local0 | PR3M) /* \_SB_.PCI0.XHC_.PR3M */ Local0 = Zero Local0 = (PR2 & 0xFFFF8000) PR2 = (Local0 | PR2M) /* \_SB_.PCI0.XHC_.PR2M */ } } Method (ESEL, 0, Serialized) { If (((XHCI == 0x02) || (XHCI == 0x03))) { PR3 &= 0xFFFFFFC0 PR2 &= 0xFFFF8000 XUSB = Zero XRST = Zero } } Method (XWAK, 0, Serialized) { If (((XUSB == One) || (XRST == One))) { XSEL () } } Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) } Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } Device (RHUB) { Name (_ADR, Zero) // _ADR: Address Device (HS01) { Name (_ADR, One) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & One)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U1 /* \U1U1 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & One)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P1 /* \U1P1 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = One Return (Local0) } } } Device (HS02) { Name (_ADR, 0x02) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x02)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U2 /* \U1U2 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x02)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P2 /* \U1P2 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x02 Return (Local0) } } } Device (HS03) { Name (_ADR, 0x03) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x04)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U3 /* \U1U3 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x04)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P3 /* \U1P3 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x03 Return (Local0) } } } Device (HS04) { Name (_ADR, 0x04) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x08)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U4 /* \U1U4 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x08)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P4 /* \U1P4 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x04 Return (Local0) } } } Device (HS05) { Name (_ADR, 0x05) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x10)) { Return (UPC3) /* \UPC3 */ } Else { Return (U2U1) /* \U2U1 */ } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x10)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U2P1 /* \U2P1 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x05 Return (Local0) } } } Device (HS06) { Name (_ADR, 0x06) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x20)) { Return (UPC3) /* \UPC3 */ } Else { Return (U2U2) /* \U2U2 */ } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x20)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U2P2 /* \U2P2 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x06 Return (Local0) } } } Device (HS07) { Name (_ADR, 0x07) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x40)) { Return (UPC3) /* \UPC3 */ } Else { Return (U2U3) /* \U2U3 */ } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x40)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U2P3 /* \U2P3 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x07 Return (Local0) } } } Device (HS08) { Name (_ADR, 0x08) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x80)) { Return (UPC3) /* \UPC3 */ } Else { Return (U2U4) /* \U2U4 */ } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x80)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U2P4 /* \U2P4 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x08 Return (Local0) } } } Device (HS09) { Name (_ADR, 0x09) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x0100)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U5 /* \U1U5 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x0100)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P5 /* \U1P5 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x09 Return (Local0) } } } Device (HS10) { Name (_ADR, 0x0A) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x0200)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U6 /* \U1U6 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x0200)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P6 /* \U1P6 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x0A Return (Local0) } } } Device (HS11) { Name (_ADR, 0x0B) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x0400)) { Return (UPC3) /* \UPC3 */ } Else { Return (U2U5) /* \U2U5 */ } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x0400)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U2P5 /* \U2P5 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x0B Return (Local0) } } } Device (HS12) { Name (_ADR, 0x0C) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x0800)) { Return (UPC3) /* \UPC3 */ } Else { Return (U2U6) /* \U2U6 */ } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x0800)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U2P6 /* \U2P6 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x0C Return (Local0) } } } Device (HS13) { Name (_ADR, 0x0D) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x1000)) { Return (UPC3) /* \UPC3 */ } Else { Return (U1U7) /* \U1U7 */ } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x1000)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P7 /* \U1P7 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x0D Return (Local0) } } } Device (HS14) { Name (_ADR, 0x0E) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR2 & 0x2000)) { Return (UPC3) /* \UPC3 */ } Else { Return (U1U8) /* \U1U8 */ } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR2 & 0x2000)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P8 /* \U1P8 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x0E Return (Local0) } } } Device (HS15) { Name (_ADR, 0x0F) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (UPC3) /* \UPC3 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { Return (PLD2) /* \PLD2 */ } } Device (SSP1) { Name (_ADR, 0x10) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR3 & One)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U1 /* \U1U1 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR3 & One)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P1 /* \U1P1 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = One Return (Local0) } } } Device (SSP2) { Name (_ADR, 0x11) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR3 & 0x02)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U2 /* \U1U2 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR3 & 0x02)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P2 /* \U1P2 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x02 Return (Local0) } } } Device (SSP3) { Name (_ADR, 0x12) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (UPC3) /* \UPC3 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR3 & 0x04)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P3 /* \U1P3 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = Zero Return (Local0) } } } Device (SSP4) { Name (_ADR, 0x13) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { Return (UPC3) /* \UPC3 */ } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR3 & 0x08)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P4 /* \U1P4 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = Zero Return (Local0) } } } Device (SSP5) { Name (_ADR, 0x14) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR3 & 0x10)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U5 /* \U1U5 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR3 & 0x10)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P5 /* \U1P5 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x09 Return (Local0) } } } Device (SSP6) { Name (_ADR, 0x15) // _ADR: Address Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities { If (!(PR3 & 0x20)) { Return (UPC3) /* \UPC3 */ } Else { Local0 = U1U6 /* \U1U6 */ Local0 [One] = 0x03 Return (Local0) } } Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device { If (!(PR3 & 0x20)) { Return (PLD2) /* \PLD2 */ } Else { Local0 = U1P6 /* \U1P6 */ CreateByteField (DerefOf (Local0 [Zero]), 0x0B, GRP) GRP = 0x0A Return (Local0) } } } } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0D, 0x04)) } } Device (HDEF) { Name (_ADR, 0x001B0000) // _ADR: Address OperationRegion (HDAR, PCI_Config, 0x4C, 0x10) Field (HDAR, WordAcc, NoLock, Preserve) { DCKA, 1, Offset (0x01), DCKM, 1, , 6, DCKS, 1, Offset (0x08), Offset (0x09), PMEE, 1, , 6, PMES, 1 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x0D, 0x04)) } } Device (SAT0) { Name (_ADR, 0x001F0002) // _ADR: Address Name (FDEV, Zero) Name (FDRP, Zero) Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("SAT0 DEP Call") If ((OSYS >= 0x07DD)) { If (((S0ID == One) && ((PEPC & 0x03) != Zero))) { ADBG ("SAT0 DEP") Return (Package (0x01) { PEPD }) } } ADBG ("SAT0 DEP NULL") Return (Package (0x00){}) } Device (PRT0) { Name (_ADR, 0xFFFF) // _ADR: Address Method (_SDD, 1, Serialized) // _SDD: Set Device Data { CreateByteField (Arg0, 0x9D, BFDS) ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.FDEV */ CreateByteField (Arg0, 0x9A, BFRP) ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.FDRP */ } Method (_GTF, 0, Serialized) // _GTF: Get Task File { If ((((DVS0 == One) && ((FDEV & One) == One)) && ((FDRP & 0x80) == 0x80))) { Name (PIB1, Buffer (0x07) { 0x10, 0x09, 0x00, 0x00, 0x00, 0xB0, 0xEF // ....... }) Return (PIB1) /* \_SB_.PCI0.SAT0.PRT0._GTF.PIB1 */ } Name (PIB2, Buffer (0x07) { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ....... }) Return (PIB2) /* \_SB_.PCI0.SAT0.PRT0._GTF.PIB2 */ } } Device (PRT1) { Name (_ADR, 0x0001FFFF) // _ADR: Address Name (FDEV, Zero) Name (FDRP, Zero) Method (_SDD, 1, Serialized) // _SDD: Set Device Data { CreateByteField (Arg0, 0x9D, BFDS) ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT1.FDEV */ CreateByteField (Arg0, 0x9A, BFRP) ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT1.FDRP */ } Method (_GTF, 0, Serialized) // _GTF: Get Task File { If ((((DVS1 == One) && ((FDEV & One) == One)) && ((FDRP & 0x80) == 0x80))) { Name (PIB1, Buffer (0x07) { 0x10, 0x09, 0x00, 0x00, 0x00, 0xB0, 0xEF // ....... }) Return (PIB1) /* \_SB_.PCI0.SAT0.PRT1._GTF.PIB1 */ } Name (PIB2, Buffer (0x07) { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ....... }) Return (PIB2) /* \_SB_.PCI0.SAT0.PRT1._GTF.PIB2 */ } } Device (PRT2) { Name (_ADR, 0x0002FFFF) // _ADR: Address Name (FDEV, Zero) Name (FDRP, Zero) Method (_SDD, 1, Serialized) // _SDD: Set Device Data { CreateByteField (Arg0, 0x9D, BFDS) ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT2.FDEV */ CreateByteField (Arg0, 0x9A, BFRP) ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT2.FDRP */ } Method (_GTF, 0, Serialized) // _GTF: Get Task File { If ((((DVS2 == One) && ((FDEV & One) == One)) && ((FDRP & 0x80) == 0x80))) { Name (PIB1, Buffer (0x07) { 0x10, 0x09, 0x00, 0x00, 0x00, 0xB0, 0xEF // ....... }) Return (PIB1) /* \_SB_.PCI0.SAT0.PRT2._GTF.PIB1 */ } Name (PIB2, Buffer (0x07) { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ....... }) Return (PIB2) /* \_SB_.PCI0.SAT0.PRT2._GTF.PIB2 */ } } Device (PRT3) { Name (_ADR, 0x0003FFFF) // _ADR: Address Name (FDEV, Zero) Name (FDRP, Zero) Method (_SDD, 1, Serialized) // _SDD: Set Device Data { CreateByteField (Arg0, 0x9D, BFDS) ToInteger (BFDS, FDEV) /* \_SB_.PCI0.SAT0.PRT3.FDEV */ CreateByteField (Arg0, 0x9A, BFRP) ToInteger (BFRP, FDRP) /* \_SB_.PCI0.SAT0.PRT3.FDRP */ } Method (_GTF, 0, Serialized) // _GTF: Get Task File { If ((((DVS3 == One) && ((FDEV & One) == One)) && ((FDRP & 0x80) == 0x80))) { Name (PIB1, Buffer (0x07) { 0x10, 0x09, 0x00, 0x00, 0x00, 0xB0, 0xEF // ....... }) Return (PIB1) /* \_SB_.PCI0.SAT0.PRT3._GTF.PIB1 */ } Name (PIB2, Buffer (0x07) { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ....... }) Return (PIB2) /* \_SB_.PCI0.SAT0.PRT3._GTF.PIB2 */ } } } Device (SAT1) { Name (_ADR, 0x001F0005) // _ADR: Address } Device (SBUS) { Name (_ADR, 0x001F0003) // _ADR: Address OperationRegion (SMBP, PCI_Config, 0x40, 0xC0) Field (SMBP, DWordAcc, NoLock, Preserve) { , 2, I2CE, 1 } OperationRegion (SMPB, PCI_Config, 0x20, 0x04) Field (SMPB, DWordAcc, NoLock, Preserve) { , 5, SBAR, 11 } OperationRegion (SMBI, SystemIO, (SBAR << 0x05), 0x10) Field (SMBI, ByteAcc, NoLock, Preserve) { HSTS, 8, Offset (0x02), HCON, 8, HCOM, 8, TXSA, 8, DAT0, 8, DAT1, 8, HBDR, 8, PECR, 8, RXSA, 8, SDAT, 16 } Method (SSXB, 2, Serialized) { If (STRT ()) { Return (Zero) } I2CE = Zero HSTS = 0xBF TXSA = Arg0 HCOM = Arg1 HCON = 0x48 If (COMP ()) { HSTS |= 0xFF Return (One) } Return (Zero) } Method (SRXB, 1, Serialized) { If (STRT ()) { Return (0xFFFF) } I2CE = Zero HSTS = 0xBF TXSA = (Arg0 | One) HCON = 0x44 If (COMP ()) { HSTS |= 0xFF Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */ } Return (0xFFFF) } Method (SWRB, 3, Serialized) { If (STRT ()) { Return (Zero) } I2CE = Zero HSTS = 0xBF TXSA = Arg0 HCOM = Arg1 DAT0 = Arg2 HCON = 0x48 If (COMP ()) { HSTS |= 0xFF Return (One) } Return (Zero) } Method (SRDB, 2, Serialized) { If (STRT ()) { Return (0xFFFF) } I2CE = Zero HSTS = 0xBF TXSA = (Arg0 | One) HCOM = Arg1 HCON = 0x48 If (COMP ()) { HSTS |= 0xFF Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */ } Return (0xFFFF) } Method (SWRW, 3, Serialized) { If (STRT ()) { Return (Zero) } I2CE = Zero HSTS = 0xBF TXSA = Arg0 HCOM = Arg1 DAT1 = (Arg2 & 0xFF) DAT0 = ((Arg2 >> 0x08) & 0xFF) HCON = 0x4C If (COMP ()) { HSTS |= 0xFF Return (One) } Return (Zero) } Method (SRDW, 2, Serialized) { If (STRT ()) { Return (0xFFFF) } I2CE = Zero HSTS = 0xBF TXSA = (Arg0 | One) HCOM = Arg1 HCON = 0x4C If (COMP ()) { HSTS |= 0xFF Return (((DAT0 << 0x08) | DAT1)) } Return (0xFFFFFFFF) } Method (SBLW, 4, Serialized) { If (STRT ()) { Return (Zero) } I2CE = Arg3 HSTS = 0xBF TXSA = Arg0 HCOM = Arg1 DAT0 = SizeOf (Arg2) Local1 = Zero HBDR = DerefOf (Arg2 [Zero]) HCON = 0x54 While ((SizeOf (Arg2) > Local1)) { Local0 = 0x0FA0 While ((!(HSTS & 0x80) && Local0)) { Local0-- Stall (0x32) } If (!Local0) { KILL () Return (Zero) } HSTS = 0x80 Local1++ If ((SizeOf (Arg2) > Local1)) { HBDR = DerefOf (Arg2 [Local1]) } } If (COMP ()) { HSTS |= 0xFF Return (One) } Return (Zero) } Method (SBLR, 3, Serialized) { Name (TBUF, Buffer (0x0100){}) If (STRT ()) { Return (Zero) } I2CE = Arg2 HSTS = 0xBF TXSA = (Arg0 | One) HCOM = Arg1 HCON = 0x54 Local0 = 0x0FA0 While ((!(HSTS & 0x80) && Local0)) { Local0-- Stall (0x32) } If (!Local0) { KILL () Return (Zero) } TBUF [Zero] = DAT0 /* \_SB_.PCI0.SBUS.DAT0 */ HSTS = 0x80 Local1 = One While ((Local1 < DerefOf (TBUF [Zero]))) { Local0 = 0x0FA0 While ((!(HSTS & 0x80) && Local0)) { Local0-- Stall (0x32) } If (!Local0) { KILL () Return (Zero) } TBUF [Local1] = HBDR /* \_SB_.PCI0.SBUS.HBDR */ HSTS = 0x80 Local1++ } If (COMP ()) { HSTS |= 0xFF Return (TBUF) /* \_SB_.PCI0.SBUS.SBLR.TBUF */ } Return (Zero) } Method (STRT, 0, Serialized) { Local0 = 0xC8 While (Local0) { If ((HSTS & 0x40)) { Local0-- Sleep (One) If ((Local0 == Zero)) { Return (One) } } Else { Local0 = Zero } } Local0 = 0x0FA0 While (Local0) { If ((HSTS & One)) { Local0-- Stall (0x32) If ((Local0 == Zero)) { KILL () } } Else { Return (Zero) } } Return (One) } Method (COMP, 0, Serialized) { Local0 = 0x0FA0 While (Local0) { If ((HSTS & 0x02)) { Return (One) } Else { Local0-- Stall (0x32) If ((Local0 == Zero)) { KILL () } } } Return (Zero) } Method (KILL, 0, Serialized) { HCON |= 0x02 HSTS |= 0xFF } } } Scope (_SB.PCI0.LPCB) { OperationRegion (CPSB, SystemMemory, 0xDA04CE18, 0x10) Field (CPSB, AnyAcc, NoLock, Preserve) { RTCX, 1, SBB0, 7, SBB1, 8, SBB2, 8, SBB3, 8, SBB4, 8, SBB5, 8, SBB6, 8, SBB7, 8, SBB8, 8, SBB9, 8, SBBA, 8, SBBB, 8, SBBC, 8, SBBD, 8, SBBE, 8, SBBF, 8 } Method (SPTS, 1, NotSerialized) { SLPX = One SLPE = One ^^RP01.RPAV = Zero ^^RP02.RPAV = Zero ^^RP03.RPAV = Zero ^^RP05.RPAV = Zero } Method (SWAK, 1, NotSerialized) { SLPE = Zero If (RTCS){} Else { Notify (PWRB, 0x02) // Device Wake } } OperationRegion (SMIE, SystemIO, PMBS, 0x04) Field (SMIE, ByteAcc, NoLock, Preserve) { , 10, RTCS, 1, , 3, PEXS, 1, WAKS, 1, Offset (0x03), PWBT, 1, Offset (0x04) } OperationRegion (SLPR, SystemIO, SMCR, 0x08) Field (SLPR, ByteAcc, NoLock, Preserve) { , 4, SLPE, 1, , 31, SLPX, 1, Offset (0x08) } } Scope (_SB.PCI0.RP01) { Method (_INI, 0, NotSerialized) // _INI: Initialize { LTRE = LTR1 /* \LTR1 */ LMSL = PML1 /* \PML1 */ LNSL = PNL1 /* \PNL1 */ OBFF = OBF1 /* \OBF1 */ } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Scope (_SB.PCI0.RP02) { Method (_INI, 0, NotSerialized) // _INI: Initialize { LTRE = LTR2 /* \LTR2 */ LMSL = PML2 /* \PML2 */ LNSL = PNL2 /* \PNL2 */ OBFF = OBF2 /* \OBF2 */ } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Scope (_SB.PCI0.RP03) { Method (_INI, 0, NotSerialized) // _INI: Initialize { LTRE = LTR3 /* \LTR3 */ LMSL = PML3 /* \PML3 */ LNSL = PNL3 /* \PNL3 */ OBFF = OBF3 /* \OBF3 */ } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } Scope (_SB.PCI0.RP05) { Method (_INI, 0, NotSerialized) // _INI: Initialize { LTRE = LTR5 /* \LTR5 */ LMSL = PML5 /* \PML5 */ LNSL = PNL5 /* \PNL5 */ OBFF = OBF5 /* \OBF5 */ } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } OperationRegion (_SB.PCI0.LPCB.LPCR, PCI_Config, 0x80, 0x04) Field (\_SB.PCI0.LPCB.LPCR, ByteAcc, NoLock, Preserve) { CADR, 3, , 1, CBDR, 3, Offset (0x01), LTDR, 2, , 2, FDDR, 1, Offset (0x02), CALE, 1, CBLE, 1, LTLE, 1, FDLE, 1, Offset (0x03), GLLE, 1, GHLE, 1, KCLE, 1, MCLE, 1, C1LE, 1, C2LE, 1, Offset (0x04) } Method (UXDV, 1, Serialized) { Local0 = 0xFF Switch ((Arg0 + Zero)) { Case (0x03F8) { Local0 = Zero } Case (0x02F8) { Local0 = One } Case (0x0220) { Local0 = 0x02 } Case (0x0228) { Local0 = 0x03 } Case (0x0238) { Local0 = 0x04 } Case (0x02E8) { Local0 = 0x05 } Case (0x0338) { Local0 = 0x06 } Case (0x03E8) { Local0 = 0x07 } } Return (Local0) } Method (RRIO, 4, Serialized) { Switch ((Arg0 + Zero)) { Case (Zero) { CALE = Zero Local0 = UXDV (Arg2) If ((Local0 != 0xFF)) { CADR = Local0 } If (Arg1) { CALE = One } } Case (One) { CBLE = Zero Local0 = UXDV (Arg2) If ((Local0 != 0xFF)) { CBDR = Local0 } If (Arg1) { CBLE = One } } Case (0x02) { LTLE = Zero If ((Arg2 == 0x0378)) { LTDR = Zero } If ((Arg2 == 0x0278)) { LTDR = One } If ((Arg2 == 0x03BC)) { LTDR = 0x02 } If (Arg1) { LTLE = One } } Case (0x03) { FDLE = Zero If ((Arg2 == 0x03F0)) { FDDR = Zero } If ((Arg2 == 0x0370)) { FDDR = One } If (Arg1) { FDLE = One } } Case (0x08) { If ((Arg2 == 0x0200)) { If (Arg1) { GLLE = One } Else { GLLE = Zero } } If ((Arg2 == 0x0208)) { If (Arg1) { GHLE = One } Else { GHLE = Zero } } } Case (0x09) { If ((Arg2 == 0x0200)) { If (Arg1) { GLLE = One } Else { GLLE = Zero } } If ((Arg2 == 0x0208)) { If (Arg1) { GHLE = One } Else { GHLE = Zero } } } Case (0x0A) { If (((Arg2 == 0x60) || (Arg2 == 0x64))) { If (Arg1) { KCLE = One } Else { KCLE = Zero } } } Case (0x0B) { If (((Arg2 == 0x62) || (Arg2 == 0x66))) { If (Arg1) { MCLE = One } Else { MCLE = Zero } } } Case (0x0C) { If ((Arg2 == 0x2E)) { If (Arg1) { C1LE = One } Else { C1LE = Zero } } If ((Arg2 == 0x4E)) { If (Arg1) { C2LE = One } Else { C2LE = Zero } } } Case (0x0D) { If ((Arg2 == 0x2E)) { If (Arg1) { C1LE = One } Else { C1LE = Zero } } If ((Arg2 == 0x4E)) { If (Arg1) { C2LE = One } Else { C2LE = Zero } } } } } Method (RDMA, 3, NotSerialized) { } Scope (_SB.PCI0) { Name (PA0H, Zero) Name (PA1H, Zero) Name (PA1L, Zero) Name (PA2H, Zero) Name (PA2L, Zero) Name (PA3H, Zero) Name (PA3L, Zero) Name (PA4H, Zero) Name (PA4L, Zero) Name (PA5H, Zero) Name (PA5L, Zero) Name (PA6H, Zero) Name (PA6L, Zero) Method (NPTS, 1, NotSerialized) { PA0H = PM0H /* \_SB_.PCI0.PM0H */ PA1H = PM1H /* \_SB_.PCI0.PM1H */ PA1L = PM1L /* \_SB_.PCI0.PM1L */ PA2H = PM2H /* \_SB_.PCI0.PM2H */ PA2L = PM2L /* \_SB_.PCI0.PM2L */ PA3H = PM3H /* \_SB_.PCI0.PM3H */ PA3L = PM3L /* \_SB_.PCI0.PM3L */ PA4H = PM4H /* \_SB_.PCI0.PM4H */ PA4L = PM4L /* \_SB_.PCI0.PM4L */ PA5H = PM5H /* \_SB_.PCI0.PM5H */ PA5L = PM5L /* \_SB_.PCI0.PM5L */ PA6H = PM6H /* \_SB_.PCI0.PM6H */ PA6L = PM6L /* \_SB_.PCI0.PM6L */ } Method (NWAK, 1, NotSerialized) { PM0H = PA0H /* \_SB_.PCI0.PA0H */ PM1H = PA1H /* \_SB_.PCI0.PA1H */ PM1L = PA1L /* \_SB_.PCI0.PA1L */ PM2H = PA2H /* \_SB_.PCI0.PA2H */ PM2L = PA2L /* \_SB_.PCI0.PA2L */ PM3H = PA3H /* \_SB_.PCI0.PA3H */ PM3L = PA3L /* \_SB_.PCI0.PA3L */ PM4H = PA4H /* \_SB_.PCI0.PA4H */ PM4L = PA4L /* \_SB_.PCI0.PA4L */ PM5H = PA5H /* \_SB_.PCI0.PA5H */ PM5L = PA5L /* \_SB_.PCI0.PA5L */ PM6H = PA6H /* \_SB_.PCI0.PA6H */ PM6L = PA6L /* \_SB_.PCI0.PA6L */ } } Scope (_PR) { Processor (CPU0, 0x01, 0x00001810, 0x06) { Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("CPU0 DEP Call") If ((S0ID == One)) { ADBG ("CPU0 DEP") Return (Package (0x01) { \_SB.PEPD }) } Else { ADBG ("CPU0 DEP NULL") Return (Package (0x00){}) } } } Processor (CPU1, 0x02, 0x00001810, 0x06) { Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("CPU1 DEP Call") If ((S0ID == One)) { ADBG ("CPU1 DEP") Return (Package (0x01) { \_SB.PEPD }) } Else { ADBG ("CPU1 DEP NULL") Return (Package (0x00){}) } } } Processor (CPU2, 0x03, 0x00001810, 0x06) { Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("CPU2 DEP Call") If ((S0ID == One)) { ADBG ("CPU2 DEP") Return (Package (0x01) { \_SB.PEPD }) } Else { ADBG ("CPU2 DEP NULL") Return (Package (0x00){}) } } } Processor (CPU3, 0x04, 0x00001810, 0x06) { Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("CPU3 DEP Call") If ((S0ID == One)) { ADBG ("CPU3 DEP") Return (Package (0x01) { \_SB.PEPD }) } Else { ADBG ("CPU3 DEP NULL") Return (Package (0x00){}) } } } Processor (CPU4, 0x05, 0x00001810, 0x06) { Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("CPU4 DEP Call") If ((S0ID == One)) { ADBG ("CPU4 DEP") Return (Package (0x01) { \_SB.PEPD }) } Else { ADBG ("CPU4 DEP NULL") Return (Package (0x00){}) } } } Processor (CPU5, 0x06, 0x00001810, 0x06) { Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("CPU5 DEP Call") If ((S0ID == One)) { ADBG ("CPU5 DEP") Return (Package (0x01) { \_SB.PEPD }) } Else { ADBG ("CPU5 DEP NULL") Return (Package (0x00){}) } } } Processor (CPU6, 0x07, 0x00001810, 0x06) { Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("CPU6 DEP Call") If ((S0ID == One)) { ADBG ("CPU6 DEP") Return (Package (0x01) { \_SB.PEPD }) } Else { ADBG ("CPU6 DEP NULL") Return (Package (0x00){}) } } } Processor (CPU7, 0x08, 0x00001810, 0x06) { Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("CPU7 DEP Call") If ((S0ID == One)) { ADBG ("CPU7 DEP") Return (Package (0x01) { \_SB.PEPD }) } Else { ADBG ("CPU7 DEP NULL") Return (Package (0x00){}) } } } } Name (ECUP, One) Mutex (EHLD, 0x00) Scope (\) { Device (NFC1) { Name (_HID, EisaId ("SKTD000")) // _HID: Hardware ID Method (_STA, 0, NotSerialized) // _STA: Status { If ((NFCE == 0x03)) { Return (0x0F) } Else { Return (Zero) } } } Device (NFC2) { Name (_HID, EisaId ("NXP5442") /* NXP 5442 Near Field Communications Controller */) // _HID: Hardware ID Method (_STA, 0, NotSerialized) // _STA: Status { If ((NFCE == 0x02)) { Return (0x0F) } Else { Return (Zero) } } } Device (NFC3) { Name (_HID, EisaId ("ICV0A12")) // _HID: Hardware ID Method (_STA, 0, NotSerialized) // _STA: Status { If ((NFCE == One)) { Return (0x0F) } Else { Return (Zero) } } } } Mutex (MUTX, 0x00) OperationRegion (DEB0, SystemIO, 0x80, One) Field (DEB0, ByteAcc, NoLock, Preserve) { DBG8, 8 } OperationRegion (DEB1, SystemIO, 0x90, 0x02) Field (DEB1, WordAcc, NoLock, Preserve) { DBG9, 16 } OperationRegion (PRT0, SystemIO, 0x80, 0x04) Field (PRT0, DWordAcc, Lock, Preserve) { P80H, 32 } Method (P8XH, 2, Serialized) { If ((Arg0 == Zero)) { P80D = ((P80D & 0xFFFFFF00) | Arg1) } If ((Arg0 == One)) { P80D = ((P80D & 0xFFFF00FF) | (Arg1 << 0x08)) } If ((Arg0 == 0x02)) { P80D = ((P80D & 0xFF00FFFF) | (Arg1 << 0x10)) } If ((Arg0 == 0x03)) { P80D = ((P80D & 0x00FFFFFF) | (Arg1 << 0x18)) } P80H = P80D /* \P80D */ } Method (ADBG, 1, Serialized) { If (CondRefOf (MDBG)) { Return (MDBG) /* External reference */ Arg0 } Return (Zero) } OperationRegion (SPRT, SystemIO, 0xB2, 0x02) Field (SPRT, ByteAcc, Lock, Preserve) { SSMP, 8 } Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model { GPIC = Arg0 PICM = Arg0 } Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep { P80D = Zero P8XH (Zero, Arg0) PTS (Arg0) ADBG (Concatenate ("_PTS=", ToHexString (Arg0))) If ((ICNF & 0x10)) { If (CondRefOf (\_SB.IAOE.PTSL)) { \_SB.IAOE.PTSL = Arg0 } } If ((Arg0 == 0x03)) { If ((DTSE && (TCNT > One))) { TRAP (TRTD, 0x1E) } If ((ECON == One)) { If ((ICNF & One)) { If (((ICNF & 0x10) && (\_SB.IAOE.ITMR == Zero))) { If ((CondRefOf (\_SB.PCI0.LPCB.H_EC.AWT0) && CondRefOf (\_SB.IAOE.ECTM))) { If ((\_SB.IAOE.ECTM > Zero)) { \_SB.PCI0.LPCB.H_EC.ECWT ((\_SB.IAOE.ECTM & 0xFF), RefOf (\_SB.PCI0.LPCB.H_EC.AWT0)) \_SB.PCI0.LPCB.H_EC.ECWT (((\_SB.IAOE.ECTM & 0xFF00) >> 0x08), RefOf (\_SB.PCI0.LPCB.H_EC.AWT1)) \_SB.PCI0.LPCB.H_EC.ECWT (((\_SB.IAOE.ECTM & 0x00FF0000) >> 0x10), RefOf (\_SB.PCI0.LPCB.H_EC.AWT2)) Local0 = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.WTMS)) \_SB.PCI0.LPCB.H_EC.ECWT ((0x81 | Local0), RefOf (\_SB.PCI0.LPCB.H_EC.WTMS)) } } } If (((ICNF & 0x10) && CondRefOf (\_SB.IFFS.FFSS))) { If ((\_SB.IFFS.FFSS & One)) { \_SB.IAOE.FFSE = One If ((CondRefOf (\_SB.PCI0.LPCB.H_EC.WTMS) && (\_SB.IAOE.PTSL == 0x03))) { Local0 = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.WTMS)) \_SB.PCI0.LPCB.H_EC.ECWT ((0x02 | Local0), RefOf (\_SB.PCI0.LPCB.H_EC.WTMS)) } } Else { \_SB.IAOE.FFSE = Zero } } } } } If (((Arg0 == 0x03) || (Arg0 == 0x04))) { If ((CondRefOf (\_SB.PCI0.LPCB.H_EC.PB10) && ECON)) { If (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.PB10))) { PB1E |= 0x80 } Else { PB1E &= 0x7F } } } If (CondRefOf (\_SB.TPM.PTS)) { \_SB.TPM.PTS (Arg0) } If ((((Arg0 == 0x03) || (Arg0 == 0x04)) || (Arg0 == 0x05))) { If ((PFLV == FDTP)) { GP27 = One } } } Method (_WAK, 1, Serialized) // _WAK: Wake { P8XH (One, 0xAB) WAK (Arg0) ADBG ("_WAK") If (((Arg0 == 0x03) || (Arg0 == 0x04))) { If (CondRefOf (\_SB.PCI0.PEG0.PEGP.EPON)) { \_SB.PCI0.PEG0.PEGP.EPON () } If (CondRefOf (\_SB.PCI0.RP05.PEGP.EPON)) { \_SB.PCI0.RP05.PEGP.EPON () } } If ((((\_SB.PCI0.B0D3.ABAR & 0xFFFFC004) != 0xFFFFC004) && (( \_SB.PCI0.B0D3.ABAR & 0xFFFFC000) != Zero))) { \_SB.PCI0.B0D3.BARA = \_SB.PCI0.B0D3.ABAR } If ((ICNF & 0x10)) { If ((\_SB.PCI0.GFX0.TCHE & 0x0100)) { If ((\_SB.IAOE.ITMR == One)) { If (((\_SB.IAOE.IBT1 & One) && ((\_SB.IAOE.WKRS & 0x02) || ( \_SB.IAOE.WKRS & 0x10)))) { \_SB.PCI0.GFX0.STAT = ((\_SB.PCI0.GFX0.STAT & 0xFFFFFFFFFFFFFFFC) | One) } Else { \_SB.PCI0.GFX0.STAT = (\_SB.PCI0.GFX0.STAT & 0xFFFFFFFFFFFFFFFC) } } ElseIf ((ECON == One)) { If (CondRefOf (\_SB.PCI0.LPCB.H_EC.IBT1)) { If (((\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.IBT1)) & One) && ((\_SB.IAOE.WKRS & 0x02 ) || (\_SB.IAOE.WKRS & 0x10)))) { \_SB.PCI0.GFX0.STAT = ((\_SB.PCI0.GFX0.STAT & 0xFFFFFFFFFFFFFFFC) | One) } Else { \_SB.PCI0.GFX0.STAT = (\_SB.PCI0.GFX0.STAT & 0xFFFFFFFFFFFFFFFC) } } } } If (CondRefOf (\_SB.IAOE.PTSL)) { \_SB.IAOE.PTSL = Zero } If ((\_SB.IAOE.ITMR == Zero)) { If (CondRefOf (\_SB.PCI0.LPCB.H_EC.WTMS)) { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.WTMS)) } } If (CondRefOf (\_SB.IAOE.ECTM)) { \_SB.IAOE.ECTM = Zero } If (CondRefOf (\_SB.IAOE.RCTM)) { \_SB.IAOE.RCTM = Zero } } If (NEXP) { If ((OSCC & 0x02)) { \_SB.PCI0.NHPG () } If ((OSCC & 0x04)) { \_SB.PCI0.NPME () } } If ((Arg0 == 0x03)) { If ((Zero == ACTT)) { If ((ECON == One)) { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.CFAN)) } } } If (((Arg0 == 0x03) || (Arg0 == 0x04))) { If ((CondRefOf (\_SB.PCI0.LPCB.H_EC.PB10) && ECON)) { If ((PB1E & 0x80)) { \_SB.PCI0.LPCB.H_EC.ECWT (One, RefOf (\_SB.PCI0.LPCB.H_EC.PB10)) } } If ((GBSX & 0x40)) { \_SB.PCI0.GFX0.IUEH (0x06) } If ((GBSX & 0x80)) { \_SB.PCI0.GFX0.IUEH (0x07) } If ((DTSE && (TCNT > One))) { TRAP (TRTD, 0x14) } If ((OSYS == 0x07D2)) { If ((\_PR.CFGD & One)) { If ((\_PR.CPU0._PPC > Zero)) { \_PR.CPU0._PPC -= One PNOT () \_PR.CPU0._PPC += One PNOT () } Else { \_PR.CPU0._PPC += One PNOT () \_PR.CPU0._PPC -= One PNOT () } } } If ((ECON == One)) { If (((Arg0 == 0x03) || (Arg0 == 0x04))) { LIDS = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.LSTE)) If (IGDS) { If ((LIDS == Zero)) { \_SB.PCI0.GFX0.CLID = 0x80000000 } If ((LIDS == One)) { \_SB.PCI0.GFX0.CLID = 0x80000003 } } Notify (\_SB.LID0, 0x80) // Status Change } If ((\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.DOCK)) != DSTS)) { DSTS = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.DOCK)) If ((\_SB.PCI0.HDEF.DCKS && One)) { \_SB.PCI0.HDEF.DCKA = DSTS /* \DSTS */ } If ((DSTS == One)) { If ((Arg0 == 0x03)) { Sleep (0x03E8) SSMP = PDBR /* \PDBR */ Sleep (0x03E8) } Notify (\_SB.PCI0.DOCK, Zero) // Bus Check } Else { Notify (\_SB.PCI0.DOCK, One) // Device Check } } If ((BNUM == Zero)) { If ((\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.VPWR)) != PWRS)) { PWRS = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.VPWR)) PNOT () } } ElseIf ((\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.RPWR)) != PWRS)) { PWRS = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.RPWR)) PNOT () } } If ((RP1D == Zero)) { Notify (\_SB.PCI0.RP01, Zero) // Bus Check } If ((RP2D == Zero)) { Notify (\_SB.PCI0.RP02, Zero) // Bus Check } If ((RP3D == Zero)) { Notify (\_SB.PCI0.RP03, Zero) // Bus Check } If ((RP5D == Zero)) { Notify (\_SB.PCI0.RP05, Zero) // Bus Check } } If (((Arg0 == 0x03) || (Arg0 == 0x04))) { \_SB.PCI0.XHC.XWAK () } Return (Package (0x02) { Zero, Zero }) } Method (GETB, 3, Serialized) { Local0 = (Arg0 * 0x08) Local1 = (Arg1 * 0x08) CreateField (Arg2, Local0, Local1, TBF3) Return (TBF3) /* \GETB.TBF3 */ } Method (PNOT, 0, Serialized) { If (CondRefOf (\_SB.PCCD.PENB)) { Notify (\_SB.PCCD, 0x82) // Device-Specific Change } ElseIf ((TCNT > One)) { If ((PDC0 & 0x08)) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change } If ((PDC1 & 0x08)) { Notify (\_PR.CPU1, 0x80) // Performance Capability Change } If ((PDC2 & 0x08)) { Notify (\_PR.CPU2, 0x80) // Performance Capability Change } If ((PDC3 & 0x08)) { Notify (\_PR.CPU3, 0x80) // Performance Capability Change } If ((PDC4 & 0x08)) { Notify (\_PR.CPU4, 0x80) // Performance Capability Change } If ((PDC5 & 0x08)) { Notify (\_PR.CPU5, 0x80) // Performance Capability Change } If ((PDC6 & 0x08)) { Notify (\_PR.CPU6, 0x80) // Performance Capability Change } If ((PDC7 & 0x08)) { Notify (\_PR.CPU7, 0x80) // Performance Capability Change } } Else { Notify (\_PR.CPU0, 0x80) // Performance Capability Change } If ((TCNT > One)) { If (((PDC0 & 0x08) && (PDC0 & 0x10))) { Notify (\_PR.CPU0, 0x81) // C-State Change } If (((PDC1 & 0x08) && (PDC1 & 0x10))) { Notify (\_PR.CPU1, 0x81) // C-State Change } If (((PDC2 & 0x08) && (PDC2 & 0x10))) { Notify (\_PR.CPU2, 0x81) // C-State Change } If (((PDC3 & 0x08) && (PDC3 & 0x10))) { Notify (\_PR.CPU3, 0x81) // C-State Change } If (((PDC4 & 0x08) && (PDC4 & 0x10))) { Notify (\_PR.CPU4, 0x81) // C-State Change } If (((PDC5 & 0x08) && (PDC5 & 0x10))) { Notify (\_PR.CPU5, 0x81) // C-State Change } If (((PDC6 & 0x08) && (PDC6 & 0x10))) { Notify (\_PR.CPU6, 0x81) // C-State Change } If (((PDC7 & 0x08) && (PDC7 & 0x10))) { Notify (\_PR.CPU7, 0x81) // C-State Change } } Else { Notify (\_PR.CPU0, 0x81) // C-State Change } If ((ECON == One)) { B1SC = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B1CC)) B1SS = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B1ST)) B2SC = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B2CC)) B2SS = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B2ST)) If ((OSYS >= 0x07D6)) { Notify (\_SB.PCI0.LPCB.H_EC.BAT0, 0x81) // Information Change Notify (\_SB.PCI0.LPCB.H_EC.BAT1, 0x81) // Information Change Notify (\_SB.PCI0.LPCB.H_EC.BAT2, 0x81) // Information Change } Else { Notify (\_SB.PCI0.LPCB.H_EC.BAT0, 0x80) // Status Change Notify (\_SB.PCI0.LPCB.H_EC.BAT1, 0x80) // Status Change Notify (\_SB.PCI0.LPCB.H_EC.BAT2, 0x80) // Status Change } } If ((DPTF == One)) { Notify (\_SB.IETM, 0x86) // Device-Specific } } OperationRegion (MBAR, SystemMemory, ((\_SB.PCI0.MHBR << 0x0F) + 0x5000), 0x1000) Field (MBAR, ByteAcc, NoLock, Preserve) { Offset (0x938), PWRU, 4, Offset (0x9A0), PPL1, 15, PL1E, 1, CLP1, 1 } Name (CLMP, Zero) Name (PLEN, Zero) Name (PLSV, 0x8000) Name (CSEM, Zero) Method (SPL1, 0, Serialized) { Name (PPUU, Zero) If ((CSEM == One)) { Return (Zero) } CSEM = One PLSV = PPL1 /* \PPL1 */ PLEN = PL1E /* \PL1E */ CLMP = CLP1 /* \CLP1 */ If ((PWRU == Zero)) { PPUU = One } Else { PPUU = (PWRU-- << 0x02) } Local0 = (PLVL * PPUU) /* \SPL1.PPUU */ Local1 = (Local0 / 0x03E8) PPL1 = Local1 PL1E = One CLP1 = One } Method (RPL1, 0, Serialized) { PPL1 = PLSV /* \PLSV */ PL1E = PLEN /* \PLEN */ CLP1 = CLMP /* \CLMP */ CSEM = Zero } Name (DDPS, Zero) Name (UAMS, Zero) Method (GUAM, 1, Serialized) { If ((Arg0 != DDPS)) { DDPS = Arg0 UAMS = (Arg0 && ~PWRS) If (Arg0) { If ((ECNO == One)) { ADBG ("EC Notify") If ((ECDB == One)) { ADBG ("EC Debug") \_SB.PCI0.LPCB.H_EC.ECWT (One, RefOf (\_SB.PCI0.LPCB.H_EC.DLED)) } \_SB.PCI0.LPCB.H_EC.ECMD (0x2C) If ((ECLP == One)) { ECUP = Zero } } P8XH (Zero, 0xC5) P8XH (One, Zero) ADBG ("Enter CS") If (PSCP) { If ((CondRefOf (\_PR.CPU0._PSS) && CondRefOf (\_PR.CPU0._PPC))) { \_PR.CPU0._PPC = (SizeOf (\_PR.CPU0._PSS) - One) PNOT () } } If (PLCS) { SPL1 () } } Else { If ((ECNO == One)) { ADBG ("EC Notify") Local0 = Acquire (EHLD, 0xFFFF) If ((Local0 == Zero)) { \_SB.PCI0.LPCB.H_EC.ECMD (0x2D) If ((ECLP == One)) { ECUP = One } Release (EHLD) } ADBG ("EC Debug") \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.DLED)) } P8XH (Zero, 0xC5) P8XH (One, 0xAB) ADBG ("Exit CS") If (PSCP) { If (CondRefOf (\_PR.CPU0._PPC)) { \_PR.CPU0._PPC = Zero PNOT () } } If (PLCS) { RPL1 () } } P_CS () } } Method (P_CS, 0, Serialized) { If (CondRefOf (\_SB.PCI0.PAUD.PUAM)) { \_SB.PCI0.PAUD.PUAM () } If ((OSYS == 0x07DC)) { If (CondRefOf (\_SB.PCI0.XHC.DUAM)) { \_SB.PCI0.XHC.DUAM () } } } Method (TRAP, 2, Serialized) { SMIF = Arg1 If ((Arg0 == TRTD)) { DTSF = Arg1 TRPD = Zero Return (DTSF) /* \DTSF */ } If ((Arg0 == TRTI)) { TRPH = Zero } If ((Arg0 == PFTI)) { TRPF = Zero } Return (SMIF) /* \SMIF */ } Scope (_SB.PCI0) { Method (PTMA, 0, NotSerialized) { Return (PFMA) /* \PFMA */ } Method (PTMS, 0, NotSerialized) { Return (PFMS) /* \PFMS */ } Method (PTIA, 0, NotSerialized) { Return (PFIA) /* \PFIA */ } Method (_INI, 0, NotSerialized) // _INI: Initialize { OSYS = 0x07D0 If (CondRefOf (\_OSI, Local0)) { If (_OSI ("Linux")) { OSYS = 0x03E8 } If (_OSI ("Windows 2001")) { OSYS = 0x07D1 } If (_OSI ("Windows 2001 SP1")) { OSYS = 0x07D1 } If (_OSI ("Windows 2001 SP2")) { OSYS = 0x07D2 } If (_OSI ("Windows 2001.1")) { OSYS = 0x07D3 } If (_OSI ("Windows 2006")) { OSYS = 0x07D6 } If (_OSI ("Windows 2009")) { OSYS = 0x07D9 } If (_OSI ("Windows 2012")) { OSYS = 0x07DC } If (_OSI ("Windows 2013")) { OSYS = 0x07DD } } PINI () } Method (NHPG, 0, Serialized) { ^RP01.HPEX = Zero ^RP02.HPEX = Zero ^RP03.HPEX = Zero ^RP05.HPEX = Zero ^RP01.HPSX = One ^RP02.HPSX = One ^RP03.HPSX = One ^RP05.HPSX = One } Method (NPME, 0, Serialized) { ^RP01.PMEX = Zero ^RP02.PMEX = Zero ^RP03.PMEX = Zero ^RP05.PMEX = Zero ^RP01.PMSX = One ^RP02.PMSX = One ^RP03.PMSX = One ^RP05.PMSX = One } } Scope (\) { Name (PICM, Zero) Name (PRWP, Package (0x02) { Zero, Zero }) Method (GPRW, 2, NotSerialized) { PRWP [Zero] = Arg0 Local0 = (SS1 << One) Local0 |= (SS2 << 0x02) Local0 |= (SS3 << 0x03) Local0 |= (SS4 << 0x04) If (((One << Arg1) & Local0)) { PRWP [One] = Arg1 } Else { Local0 >>= One FindSetLeftBit (Local0, PRWP [One]) } Return (PRWP) /* \PRWP */ } } Scope (_SB) { Name (OSCI, Zero) Name (OSCO, Zero) Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities { If ((OSCM (Arg0, Arg1, Arg2, Arg3) != Zero)) { Return (Arg3) } CreateDWordField (Arg3, Zero, STS0) CreateDWordField (Arg3, 0x04, CAP0) If ((Arg0 == ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */)) { If ((Arg1 == One)) { If ((CAP0 & 0x04)) { OSCO = 0x04 If (((SGMD & 0x0F) != 0x02)) { If ((RTD3 == Zero)) { CAP0 &= 0x3B STS0 |= 0x10 } } } If ((CAP0 & 0x20)) { If (CondRefOf (\_SB.PCCD.PENB)) { If ((^PCCD.PENB == Zero)) { CAP0 &= 0x1F STS0 |= 0x10 } } Else { CAP0 &= 0x1F STS0 |= 0x10 } } } Else { STS0 &= 0xFFFFFF00 STS0 |= 0x0A } } Else { STS0 &= 0xFFFFFF00 STS0 |= 0x06 } Return (Arg3) } Device (PEPD) { Name (_HID, "INT33A1" /* Intel Power Engine */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0D80") /* Windows-compatible System Power Management Controller */) // _CID: Compatible ID Name (_UID, One) // _UID: Unique ID Name (PEPP, Zero) Name (DEVS, Package (0x03) { 0x02, Package (0x01) { "\\_SB.PCI0.GFX0" }, Package (0x01) { "\\_SB.PCI0.SAT0.PRT1" } }) Name (DEVX, Package (0x08) { Package (0x02) { "\\_SB.PCI0.GFX0", 0xFFFFFFFF }, Package (0x02) { "\\_SB.PCI0.SAT0.PRT1", 0xFFFFFFFF }, Package (0x02) { "\\_SB.PCI0.UA01", 0xFFFFFFFF }, Package (0x02) { "\\_SB.PCI0.SDHC", 0xFFFFFFFF }, Package (0x02) { "\\_SB.PCI0.I2C0", 0xFFFFFFFF }, Package (0x02) { "\\_SB.PCI0.I2C1", 0xFFFFFFFF }, Package (0x02) { "\\_SB.PCI0.XHC", 0xFFFFFFFF }, Package (0x02) { "HDAUDIO\\FUNC_01&VEN_10EC&DEV_0282&SUBSYS_00000000&REV_1000\\4&a02b74b&0&0001", 0xFFFFFFFF } }) Name (DEVY, Package (0x12) { Package (0x03) { "\\_PR.CPU0", One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { "\\_PR.CPU1", One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { "\\_PR.CPU2", One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { "\\_PR.CPU3", One, Package (0x02) { Zero, Package (0x02) { 0xFF, Zero } } }, Package (0x03) { "\\_SB.PCI0.GFX0", One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { "\\_SB.PCI0.SAT0", One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { "\\_SB.PCI0.SAT0.PRT0", One, Package (0x02) { Zero, Package (0x03) { 0xFF, Zero, 0x81 } } }, Package (0x03) { "\\_SB.PCI0.SAT0.PRT1", One, Package (0x02) { Zero, Package (0x03) { 0xFF, Zero, 0x81 } } }, Package (0x03) { "\\_SB.PCI0.SAT0.PRT2", One, Package (0x02) { Zero, Package (0x03) { 0xFF, Zero, 0x81 } } }, Package (0x03) { "\\_SB.PCI0.SAT0.PRT3", One, Package (0x02) { Zero, Package (0x03) { 0xFF, Zero, 0x81 } } }, Package (0x03) { "\\_SB.PCI0.UA00", One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { "\\_SB.PCI0.UA01", One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { "\\_SB.PCI0.SDHC", One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { "\\_SB.PCI0.I2C0", One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { "\\_SB.PCI0.I2C1", One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { "\\_SB.PCI0.XHC", One, Package (0x02) { Zero, Package (0x02) { 0xFF, 0x03 } } }, Package (0x03) { "HDAUDIO\\FUNC_01&VEN_10EC&DEV_0282*", One, Package (0x03) { Zero, Package (0x02) { Zero, Zero }, Package (0x02) { One, 0x03 } } }, Package (0x03) { "\\_SB.PCI0.ADSP", One, Package (0x03) { Zero, Package (0x02) { Zero, Zero }, Package (0x02) { One, 0x03 } } } }) Name (BCCD, Package (0x05) { Package (0x02) { "\\_SB.PCI0.SAT0", Package (0x01) { Package (0x03) { Package (0x05) { One, 0x08, Zero, One, 0xB2 }, Package (0x03) { Zero, 0xCD, One }, 0x3E80 } } }, Package (0x02) { "\\_SB.PCI0.SAT0.PRT0", Package (0x01) { Package (0x03) { Package (0x05) { One, 0x08, Zero, One, 0xB2 }, Package (0x03) { Zero, 0xCD, One }, 0x3E80 } } }, Package (0x02) { "\\_SB.PCI0.SAT0.PRT1", Package (0x01) { Package (0x03) { Package (0x05) { One, 0x08, Zero, One, 0xB2 }, Package (0x03) { Zero, 0xCD, One }, 0x3E80 } } }, Package (0x02) { "\\_SB.PCI0.SAT0.PRT2", Package (0x01) { Package (0x03) { Package (0x05) { One, 0x08, Zero, One, 0xB2 }, Package (0x03) { Zero, 0xCD, One }, 0x3E80 } } }, Package (0x02) { "\\_SB.PCI0.SAT0.PRT3", Package (0x01) { Package (0x03) { Package (0x05) { One, 0x08, Zero, One, 0xB2 }, Package (0x03) { Zero, 0xCD, One }, 0x3E80 } } } }) Method (_STA, 0, NotSerialized) // _STA: Status { If ((OSYS >= 0x07DC)) { If (((CDID & 0xF000) == 0x9000)) { If ((S0ID == One)) { Return (0x0F) } } } Return (Zero) } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("b8febfe0-baf8-454b-aecd-49fb91137b21"))) { If ((Arg2 == Zero)) { Return (Buffer (One) { 0x07 // . }) } If ((Arg2 == One)) { PEPP = One Return (0x0F) } If ((Arg2 == 0x02)) { If ((Arg1 == Zero)) { Switch (PEPY) { Case (One) { Return (Package (0x02) { One, Package (0x01) { "\\_SB.PCI0.GFX0" } }) } Case (0x02) { Return (Package (0x02) { One, Package (0x01) { "\\_SB.PCI0.SAT0.PRT1" } }) } Case (0x03) { Return (DEVS) /* \_SB_.PEPD.DEVS */ } Default { Return (Package (0x01) { Zero }) } } } If ((Arg1 == One)) { If (!(PEPY & One)) { DerefOf (DEVX [Zero]) [One] = Zero } If (!(PEPY & 0x02)) { DerefOf (DEVX [One]) [One] = Zero } If (!(PEPY & 0x04)) { DerefOf (DEVX [0x02]) [One] = Zero } If (!(PEPY & 0x08)) { DerefOf (DEVX [0x03]) [One] = Zero } If (!(PEPY & 0x10)) { DerefOf (DEVX [0x04]) [One] = Zero } If (!(PEPY & 0x20)) { DerefOf (DEVX [0x05]) [One] = Zero } If (!(PEPY & 0x40)) { DerefOf (DEVX [0x06]) [One] = Zero } If (!(PEPY & 0x80)) { DerefOf (DEVX [0x07]) [One] = Zero } Return (DEVX) /* \_SB_.PEPD.DEVX */ } } } If ((Arg0 == ToUUID ("c4eb40a0-6cd2-11e2-bcfd-0800200c9a66"))) { If ((Arg2 == Zero)) { Return (Buffer (One) { 0x07 // . }) } If ((Arg2 == One)) { If (((PEPC & 0x03) != One)) { DerefOf (DEVY [0x06]) [One] = Zero DerefOf (DEVY [0x07]) [One] = Zero DerefOf (DEVY [0x08]) [One] = Zero DerefOf (DEVY [0x09]) [One] = Zero } If (((PEPC & 0x03) != 0x02)) { DerefOf (DEVY [0x05]) [One] = Zero If (!(SPST & One)) { DerefOf (DEVY [0x06]) [One] = Zero } If (!(SPST & 0x02)) { DerefOf (DEVY [0x07]) [One] = Zero } If (!(SPST & 0x04)) { DerefOf (DEVY [0x08]) [One] = Zero } If (!(SPST & 0x08)) { DerefOf (DEVY [0x09]) [One] = Zero } } If (((PEPC & 0x04) == Zero)) { DerefOf (DEVY [0x0A]) [One] = Zero } If (((PEPC & 0x08) == Zero)) { DerefOf (DEVY [0x0B]) [One] = Zero } If (((PEPC & 0x10) == Zero)) { DerefOf (DEVY [0x0C]) [One] = Zero } If (((PEPC & 0x20) == Zero)) { DerefOf (DEVY [0x0D]) [One] = Zero } If (((PEPC & 0x40) == Zero)) { DerefOf (DEVY [0x0E]) [One] = Zero } If (((PEPC & 0x80) == Zero)) { DerefOf (DEVY [0x0F]) [One] = Zero } If (((PEPC & 0x0100) == Zero)) { DerefOf (DEVY [0x10]) [One] = Zero } If (((PEPC & 0x0200) == Zero)) { DerefOf (DEVY [0x11]) [One] = Zero } Return (DEVY) /* \_SB_.PEPD.DEVY */ } If ((Arg2 == 0x02)) { Return (BCCD) /* \_SB_.PEPD.BCCD */ } } Return (One) } } } Scope (_SB) { Device (BTKL) { Name (_HID, "INT3420" /* Intel Bluetooth RF Kill */) // _HID: Hardware ID Method (_STA, 0, NotSerialized) // _STA: Status { If (_OSI ("Windows 2012")) { If ((BID == BW2C)) { Return (0x0F) } } Return (Zero) } Method (_PS0, 0, Serialized) // _PS0: Power State 0 { GL0A &= 0x7F } Method (_PS3, 0, Serialized) // _PS3: Power State 3 { GL0A |= 0x80 } Method (PSTS, 0, NotSerialized) { Return (RDGP (0x57)) } } } Scope (_SB.PCI0) { Device (PDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00004000, // Address Length _Y1C) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00008000, // Address Length _Y1F) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y20) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y21) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y22) Memory32Fixed (ReadWrite, 0xFED20000, // Address Base 0x00020000, // Address Length ) Memory32Fixed (ReadOnly, 0xFED90000, // Address Base 0x00004000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED45000, // Address Base 0x0004B000, // Address Length ) Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) Memory32Fixed (ReadOnly, 0xFEE00000, // Address Base 0x00100000, // Address Length ) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y1D) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00010000, // Address Length _Y1E) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1C._BAS, RBR0) // _BAS: Base Address RBR0 = (^^LPCB.RCBA << 0x0E) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1D._BAS, TBR0) // _BAS: Base Address TBR0 = TBAB /* \TBAB */ CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1D._LEN, TBLN) // _LEN: Length If ((TBAB == Zero)) { TBLN = Zero } CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1E._BAS, SNR0) // _BAS: Base Address SNR0 = SRMB /* \SRMB */ CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1F._BAS, MBR0) // _BAS: Base Address MBR0 = (MHBR << 0x0F) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y20._BAS, DBR0) // _BAS: Base Address DBR0 = (DIBR << 0x0C) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y21._BAS, EBR0) // _BAS: Base Address EBR0 = (EPBR << 0x0C) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y22._BAS, XBR0) // _BAS: Base Address XBR0 = (PXBR << 0x1A) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y22._LEN, XSZ0) // _LEN: Length XSZ0 = (0x10000000 >> PXSZ) /* \_SB_.PCI0.PXSZ */ Return (BUF0) /* \_SB_.PCI0.PDRC.BUF0 */ } } } Method (BRTN, 1, Serialized) { If (((DIDX & 0x0F00) == 0x0400)) { Notify (\_SB.PCI0.GFX0.DD1F, Arg0) } } Scope (_GPE) { Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { If (((RP1D == Zero) && (\_SB.PCI0.RP01.RPAV == One))) { \_SB.PCI0.RP01.HPME () Notify (\_SB.PCI0.RP01, 0x02) // Device Wake } If (((RP2D == Zero) && (\_SB.PCI0.RP02.RPAV == One))) { \_SB.PCI0.RP02.HPME () Notify (\_SB.PCI0.RP02, 0x02) // Device Wake } If (((RP3D == Zero) && (\_SB.PCI0.RP03.RPAV == One))) { \_SB.PCI0.RP03.HPME () Notify (\_SB.PCI0.RP03, 0x02) // Device Wake } If (((RP5D == Zero) && (\_SB.PCI0.RP05.RPAV == One))) { \_SB.PCI0.RP05.HPME () Notify (\_SB.PCI0.RP05, 0x02) // Device Wake } If ((\_SB.PCI0.D1F0 == One)) { \_SB.PCI0.PEG0.HPME () Notify (\_SB.PCI0.PEG0, 0x02) // Device Wake Notify (\_SB.PCI0.PEG0.PEGP, 0x02) // Device Wake } If ((\_SB.PCI0.D1F1 == One)) { \_SB.PCI0.PEG1.HPME () Notify (\_SB.PCI0.PEG1, 0x02) // Device Wake } If ((\_SB.PCI0.D1F2 == One)) { \_SB.PCI0.PEG2.HPME () Notify (\_SB.PCI0.PEG2, 0x02) // Device Wake } } Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { If ((\_SB.PCI0.EHC1.PMEE && \_SB.PCI0.EHC1.PMES)) { Notify (\_SB.PCI0.EHC1, 0x02) // Device Wake } If ((\_SB.PCI0.EHC2.PMEE && \_SB.PCI0.EHC2.PMES)) { Notify (\_SB.PCI0.EHC2, 0x02) // Device Wake } If ((\_SB.PCI0.XHC.PMEE && \_SB.PCI0.XHC.PMES)) { Notify (\_SB.PCI0.XHC, 0x02) // Device Wake } ElseIf ((\_SB.PCI0.XHC.PMEE == Zero)) { \_SB.PCI0.XHC.PMES = One } If ((\_SB.PCI0.HDEF.PMEE && \_SB.PCI0.HDEF.PMES)) { Notify (\_SB.PCI0.HDEF, 0x02) // Device Wake } Notify (\_SB.PCI0.GLAN, 0x02) // Device Wake } Method (_L01, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { L01C += One P8XH (Zero, One) P8XH (One, L01C) If (((RP1D == Zero) && \_SB.PCI0.RP01.HPSX)) { Sleep (0x64) If (\_SB.PCI0.RP01.PDCX) { \_SB.PCI0.RP01.PDCX = One \_SB.PCI0.RP01.HPSX = One If (!\_SB.PCI0.RP01.PDSX) { \_SB.PCI0.RP01.L0SE = Zero } Notify (\_SB.PCI0.RP01, Zero) // Bus Check } Else { \_SB.PCI0.RP01.HPSX = One } } If (((RP2D == Zero) && \_SB.PCI0.RP02.HPSX)) { Sleep (0x64) If (\_SB.PCI0.RP02.PDCX) { \_SB.PCI0.RP02.PDCX = One \_SB.PCI0.RP02.HPSX = One If (!\_SB.PCI0.RP02.PDSX) { \_SB.PCI0.RP02.L0SE = Zero } Notify (\_SB.PCI0.RP02, Zero) // Bus Check } Else { \_SB.PCI0.RP02.HPSX = One } } If (((RP3D == Zero) && \_SB.PCI0.RP03.HPSX)) { If (((BID != BICO) && (BID != BICC))) { Sleep (0x64) } If (\_SB.PCI0.RP03.PDCX) { \_SB.PCI0.RP03.PDCX = One \_SB.PCI0.RP03.HPSX = One If (!\_SB.PCI0.RP03.PDSX) { \_SB.PCI0.RP03.L0SE = Zero } If (((BID != BICO) && (BID != BICC))) { Notify (\_SB.PCI0.RP03, Zero) // Bus Check } } Else { \_SB.PCI0.RP03.HPSX = One } } If (((RP5D == Zero) && \_SB.PCI0.RP05.HPSX)) { If (((BID != BICO) && (BID != BICC))) { Sleep (0x64) } If (\_SB.PCI0.RP05.PDCX) { \_SB.PCI0.RP05.PDCX = One \_SB.PCI0.RP05.HPSX = One If (!\_SB.PCI0.RP05.PDSX) { \_SB.PCI0.RP05.L0SE = Zero } If (((BID != BICO) && (BID != BICC))) { Notify (\_SB.PCI0.RP05, Zero) // Bus Check } } Else { \_SB.PCI0.RP05.HPSX = One } } } Method (_L02, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { GPEC = Zero If (CondRefOf (DTSE)) { If ((DTSE >= One)) { Notify (\_TZ.TZ00, 0x80) // Thermal Status Change Notify (\_TZ.TZ01, 0x80) // Thermal Status Change } } If (CondRefOf (\_SB.PCCD.PENB)) { If ((\_SB.PCCD.PENB == One)) { Notify (\_SB.PCCD, 0x80) // Status Change } } } Method (_L06, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { If ((\_SB.PCI0.GFX0.GSSE && !GSMI)) { \_SB.PCI0.GFX0.GSCI () } } Method (_L07, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { \_SB.PCI0.SBUS.HSTS = 0x20 } } Scope (_TZ) { Name (ETMD, One) Name (THLD, 0x78) Name (YBT4, 0x37) Name (YBT3, 0x40) Name (YBT2, 0x49) Name (YBT1, 0x50) Name (YBT0, 0x5B) PowerResource (FN00, 0x00, 0x0000) { Method (_STA, 0, Serialized) // _STA: Status { Return (VFN0) /* \VFN0 */ } Method (_ON, 0, Serialized) // _ON_: Power On { VFN0 = One If ((ECON && ETMD)) { \_SB.PCI0.LPCB.H_EC.ECWT (AC0F, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } Method (_OFF, 0, Serialized) // _OFF: Power Off { VFN0 = Zero If ((ECON && ETMD)) { If ((VFN1 != Zero)) { \_SB.PCI0.LPCB.H_EC.ECWT (AC1F, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) } Else { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) } \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } } Device (FAN0) { Name (_HID, EisaId ("PNP0C0B") /* Fan (Thermal Solution) */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { FN00 }) } PowerResource (FN01, 0x00, 0x0000) { Method (_STA, 0, Serialized) // _STA: Status { Return (VFN1) /* \VFN1 */ } Method (_ON, 0, Serialized) // _ON_: Power On { VFN1 = One If ((ECON && ETMD)) { If ((VFN0 == Zero)) { \_SB.PCI0.LPCB.H_EC.ECWT (AC1F, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } } Method (_OFF, 0, Serialized) // _OFF: Power Off { VFN1 = Zero If ((ECON && ETMD)) { If ((VFN2 != Zero)) { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) } Else { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) } \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } } Device (FAN1) { Name (_HID, EisaId ("PNP0C0B") /* Fan (Thermal Solution) */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { FN01 }) } PowerResource (FN02, 0x00, 0x0000) { Method (_STA, 0, Serialized) // _STA: Status { Return (VFN2) /* \VFN2 */ } Method (_ON, 0, Serialized) // _ON_: Power On { VFN2 = One If ((ECON && ETMD)) { If ((VFN1 == Zero)) { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } } Method (_OFF, 0, Serialized) // _OFF: Power Off { VFN2 = Zero If ((ECON && ETMD)) { If ((VFN3 != Zero)) { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) } Else { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) } \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } } Device (FAN2) { Name (_HID, EisaId ("PNP0C0B") /* Fan (Thermal Solution) */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { FN02 }) } PowerResource (FN03, 0x00, 0x0000) { Method (_STA, 0, Serialized) // _STA: Status { Return (VFN3) /* \VFN3 */ } Method (_ON, 0, Serialized) // _ON_: Power On { VFN3 = One If ((ECON && ETMD)) { If ((VFN2 == Zero)) { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } } Method (_OFF, 0, Serialized) // _OFF: Power Off { VFN3 = Zero If ((ECON && ETMD)) { If ((VFN4 != Zero)) { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) } Else { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) } \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } } Device (FAN3) { Name (_HID, EisaId ("PNP0C0B") /* Fan (Thermal Solution) */) // _HID: Hardware ID Name (_UID, 0x03) // _UID: Unique ID Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { FN03 }) } PowerResource (FN04, 0x00, 0x0000) { Method (_STA, 0, Serialized) // _STA: Status { Return (VFN4) /* \VFN4 */ } Method (_ON, 0, Serialized) // _ON_: Power On { VFN4 = One If ((ECON && ETMD)) { If ((VFN3 == Zero)) { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } } Method (_OFF, 0, Serialized) // _OFF: Power Off { VFN4 = Zero If ((ECON && ETMD)) { \_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV)) \_SB.PCI0.LPCB.H_EC.ECMD (0x1A) } } } Device (FAN4) { Name (_HID, EisaId ("PNP0C0B") /* Fan (Thermal Solution) */) // _HID: Hardware ID Name (_UID, 0x04) // _UID: Unique ID Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 { FN04 }) } ThermalZone (TZ00) { Name (PTMP, 0x0BB8) Method (_SCP, 1, Serialized) // _SCP: Set Cooling Policy { CTYP = Arg0 } Method (_CRT, 0, Serialized) // _CRT: Critical Temperature { If (CondRefOf (\_PR.ACRT)) { If ((\_PR.ACRT != Zero)) { Return ((0x0AAC + (\_PR.ACRT * 0x0A))) } } Return ((0x0AAC + (CRTT * 0x0A))) } Method (_AC0, 0, Serialized) // _ACx: Active Cooling, x=0-9 { If (CondRefOf (\_PR.AAC0)) { If ((\_PR.AAC0 != Zero)) { Return ((0x0AAC + (\_PR.AAC0 * 0x0A))) } } Return ((0x0AAC + (ACTT * 0x0A))) } Method (_AC1, 0, Serialized) // _ACx: Active Cooling, x=0-9 { Return ((0x0AAC + (ACT1 * 0x0A))) } Method (_AC2, 0, Serialized) // _ACx: Active Cooling, x=0-9 { Return (0x0AAC) } Method (_AC3, 0, Serialized) // _ACx: Active Cooling, x=0-9 { Return (0x0AAC) } Method (_AC4, 0, Serialized) // _ACx: Active Cooling, x=0-9 { Return (0x0AAC) } Name (_AL0, Package (0x01) // _ALx: Active List, x=0-9 { FAN0 }) Name (_AL1, Package (0x01) // _ALx: Active List, x=0-9 { FAN1 }) Name (_AL2, Package (0x01) // _ALx: Active List, x=0-9 { FAN2 }) Name (_AL3, Package (0x01) // _ALx: Active List, x=0-9 { FAN3 }) Name (_AL4, Package (0x01) // _ALx: Active List, x=0-9 { FAN4 }) Method (_TMP, 0, Serialized) // _TMP: Temperature { If (!ETMD) { Return (0x0BB8) } If ((DTSE == 0x03)) { Return ((0x0B10 + (CRTT * 0x0A))) } If ((DTSE == One)) { If ((PKGA == One)) { Local0 = PDTS /* \PDTS */ Return ((0x0AAC + (Local0 * 0x0A))) } Local0 = DTS1 /* \DTS1 */ If ((DTS2 > Local0)) { Local0 = DTS2 /* \DTS2 */ } If ((DTS3 > Local0)) { Local0 = DTS3 /* \DTS3 */ } If ((DTS4 > Local0)) { Local0 = DTS4 /* \DTS4 */ } Return ((0x0AAC + (Local0 * 0x0A))) } If (ECON) { Local0 = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.PLMX)) Local0 = (0x0AAC + (Local0 * 0x0A)) PTMP = Local0 Return (Local0) } Return (0x0BC2) } } ThermalZone (TZ01) { Name (PTMP, 0x0BB8) Method (_SCP, 1, Serialized) // _SCP: Set Cooling Policy { CTYP = Arg0 } Method (_CRT, 0, Serialized) // _CRT: Critical Temperature { If (CondRefOf (\_PR.ACRT)) { If ((\_PR.ACRT != Zero)) { Return ((0x0AAC + (\_PR.ACRT * 0x0A))) } } Return ((0x0AAC + (CRTT * 0x0A))) } Method (_TMP, 0, Serialized) // _TMP: Temperature { If (!ETMD) { Return (0x0BCC) } If ((DTSE == 0x03)) { Return ((0x0B10 + (CRTT * 0x0A))) } If ((DTSE == One)) { If ((PKGA == One)) { Local0 = PDTS /* \PDTS */ Return ((0x0AAC + (Local0 * 0x0A))) } Local0 = DTS1 /* \DTS1 */ If ((DTS2 > Local0)) { Local0 = DTS2 /* \DTS2 */ } If ((DTS3 > Local0)) { Local0 = DTS3 /* \DTS3 */ } If ((DTS4 > Local0)) { Local0 = DTS4 /* \DTS4 */ } Return ((0x0AAC + (Local0 * 0x0A))) } If (ECON) { Local0 = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.PECH)) Local0 *= 0x0A Local1 = \_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.PECL)) Local1 >>= 0x02 Local1 = ((Local1 * 0x0A) / 0x40) Local0 += Local1 Local0 += 0x0AAC PTMP = Local0 Return (Local0) } Return (0x0BD6) } Method (_PSL, 0, Serialized) // _PSL: Passive List { If ((TCNT == 0x08)) { Return (Package (0x08) { \_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3, \_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7 }) } If ((TCNT == 0x04)) { Return (Package (0x04) { \_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3 }) } If ((TCNT == 0x02)) { Return (Package (0x02) { \_PR.CPU0, \_PR.CPU1 }) } Return (Package (0x01) { \_PR.CPU0 }) } Method (_PSV, 0, Serialized) // _PSV: Passive Temperature { If (CondRefOf (\_PR.APSV)) { If ((\_PR.APSV != Zero)) { Return ((0x0AAC + (\_PR.APSV * 0x0A))) } } Return ((0x0AAC + (PSVT * 0x0A))) } Method (_TC1, 0, Serialized) // _TC1: Thermal Constant 1 { Return (TC1V) /* \TC1V */ } Method (_TC2, 0, Serialized) // _TC2: Thermal Constant 2 { Return (TC2V) /* \TC2V */ } Method (_TSP, 0, Serialized) // _TSP: Thermal Sampling Period { Return (TSPV) /* \TSPV */ } } } Device (WCAM) { Name (_ADR, 0x05) // _ADR: Address Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities { Name (UPCP, Package (0x04) { Zero, 0xFF, Zero, Zero }) Return (UPCP) /* \WCAM._UPC.UPCP */ } Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device { Name (PLDP, Package (0x01) { Buffer (0x14) { /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x24, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // $....... /* 0010 */ 0xC8, 0x00, 0xA0, 0x00 // .... } }) Return (PLDP) /* \WCAM._PLD.PLDP */ } } Name (PST0, Zero) Name (TST0, Zero) Name (PST1, Zero) Name (TST1, Zero) Name (PST2, Zero) Name (TST2, Zero) Name (PST3, Zero) Name (TST3, Zero) Name (PST4, Zero) Name (TST4, Zero) Name (PST5, Zero) Name (TST5, Zero) Name (PST6, Zero) Name (TST6, Zero) Name (PST7, Zero) Name (TST7, Zero) Name (BPPC, Zero) Name (THNU, Zero) Name (PURA, Zero) Name (PURB, Zero) Name (PURE, Zero) Method (MOSC, 4, NotSerialized) { If ((Arg0 == ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */)) { Local0 = Arg3 CreateDWordField (Local0, Zero, CPB1) CreateDWordField (Local0, 0x04, CPB2) If ((CPB2 & One)) { PURE = One } Return (One) } Else { If (CondRefOf (_OSI, Local0)) { If (_OSI ("Processor Aggregator Device")) { PURE = One } } Return (Zero) } } Scope (_SB.PCI0.HEC2) { Name (H2BR, 0xFED0E010) Name (H2ST, 0x00) OperationRegion (NMFS, PCI_Config, 0x40, 0x04) Field (NMFS, DWordAcc, NoLock, Preserve) { , 30, DMEN, 1, NMEN, 1 } OperationRegion (H2RP, PCI_Config, 0x60, 0x04) Field (H2RP, DWordAcc, NoLock, Preserve) { RPS0, 4, RPS1, 4, RPS2, 4, RPS3, 4, RPS4, 4, RPS5, 4, RPS6, 4, RPS7, 4 } OperationRegion (H2RT, PCI_Config, 0x64, 0x04) Field (H2RT, DWordAcc, NoLock, Preserve) { RTS0, 4, RTS1, 4, RTS2, 4, RTS3, 4, RTS4, 4, RTS5, 4, RTS6, 4, RTS7, 4 } OperationRegion (H2CP, PCI_Config, 0x70, 0x04) Field (H2CP, DWordAcc, NoLock, Preserve) { CPS0, 4, CPS1, 4, CPS2, 4, CPS3, 4, CPS4, 4, CPS5, 4, CPS6, 4, CPS7, 4 } OperationRegion (H2CT, PCI_Config, 0x74, 0x04) Field (H2CT, DWordAcc, NoLock, Preserve) { CTS0, 4, CTS1, 4, CTS2, 4, CTS3, 4, CTS4, 4, CTS5, 4, CTS6, 4, CTS7, 4 } OperationRegion (HCSR, SystemMemory, H2BR, 0x10) Field (HCSR, DWordAcc, NoLock, Preserve) { CBWW, 32, HIE, 1, HIS, 1, HIG, 1, HRD, 1, HRS, 1, Offset (0x05), HRP, 8, HWP, 8, HBD, 8, CBRW, 32, MIE, 1, MIS, 1, MIG, 1, MRD, 1, MRS, 1, Offset (0x0D), MRP, 8, MWP, 8 } Method (_INI, 0, Serialized) // _INI: Initialize { MWAK () If (PURE) { LoadTable ("PRAD", "PRADID", "PRADTID", "", "", Zero) } } Method (_STA, 0, NotSerialized) // _STA: Status { Return (H2ST) /* \_SB_.PCI0.HEC2.H2ST */ } Method (MWAK, 0, Serialized) { DBG8 = 0x11 HRD = One DBG8 = 0x12 HIE = One DBG8 = 0x13 HIG = One DBG8 = 0x14 } Method (MPTS, 0, Serialized) { DBG8 = 0x15 HIE = Zero HRD = Zero HIG = One DBG8 = 0x16 } Method (HPNF, 3, Serialized) { Local0 = ((Arg2 << 0x10) | (Arg1 << 0x08)) Local0 |= Arg0 CBWW = 0x80040011 CBWW = Local0 HIG = One } Method (DCNF, 1, Serialized) { CBWW = 0x80040011 CBWW = Arg0 HIG = One } OperationRegion (TCOS, SystemIO, 0x0464, 0x02) Field (TCOS, ByteAcc, NoLock, WriteAsZeros) { Offset (0x01), , 1, DSCI, 1 } Method (\_GPE._L24, 0, Serialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF { DBG8 = 0x17 DBG8 = 0x18 \_SB.PCI0.HEC2.DSCI = One If (\_SB.PCI0.HEC2.HIS) { DBG8 = 0x19 \_SB.PCI0.HEC2.HIS = One If (\_SB.PCI0.HEC2.MRS) { DBG8 = 0x20 \_SB.PCI0.HEC2.HRS = One \_SB.PCI0.HEC2.HIG = One } Else { DBG8 = 0x21 If (\_SB.PCI0.HEC2.MRD) { DBG8 = 0x22 If (!\_SB.PCI0.HEC2.HRD) { DBG8 = 0x23 \_SB.PCI0.HEC2.HRS = Zero \_SB.PCI0.HEC2.HRD = One \_SB.PCI0.HEC2.HIG = One } If ((\_SB.PCI0.HEC2.MWP != \_SB.PCI0.HEC2.MRP)) { DBG8 = 0x24 Local1 = \_SB.PCI0.HEC2.CBRW Local0 = \_SB.PCI0.HEC2.CBRW \_SB.PCI0.HEC2.HIG = One If (((Local0 & 0xFF) == Zero)) { PSTE = ((Local0 >> 0x10) & 0xFF) TSTE = ((Local0 >> 0x18) & 0xFF) PST0 = \_SB.PCI0.HEC2.RPS0 TST0 = \_SB.PCI0.HEC2.RTS0 PST1 = \_SB.PCI0.HEC2.RPS1 TST1 = \_SB.PCI0.HEC2.RTS1 PST2 = \_SB.PCI0.HEC2.RPS2 TST2 = \_SB.PCI0.HEC2.RTS2 PST3 = \_SB.PCI0.HEC2.RPS3 TST3 = \_SB.PCI0.HEC2.RTS3 PST4 = \_SB.PCI0.HEC2.RPS4 TST4 = \_SB.PCI0.HEC2.RTS4 PST5 = \_SB.PCI0.HEC2.RPS5 TST5 = \_SB.PCI0.HEC2.RTS5 PST6 = \_SB.PCI0.HEC2.RPS6 TST6 = \_SB.PCI0.HEC2.RTS6 PST7 = \_SB.PCI0.HEC2.RPS7 TST7 = \_SB.PCI0.HEC2.RTS7 \_PR.CPU0._PPC = \_SB.PCI0.HEC2.RPS0 If ((\_SB.PCI0.HEC2.RPS0 != BPPC)) { BPPC = \_SB.PCI0.HEC2.RPS0 PETE |= 0x80 } If (Ones) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change } If (Zero) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change } If (Zero) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change } If (Zero) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change } If (Zero) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change } If (Zero) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change } If (Zero) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change } If (Zero) { Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change Notify (\_PR.CPU0, 0x80) // Performance Capability Change Notify (\_PR.CPU0, 0x82) // Throttling Capability Change Notify (\_PR.CPU1, 0x80) // Performance Capability Change Notify (\_PR.CPU1, 0x82) // Throttling Capability Change Notify (\_PR.CPU2, 0x80) // Performance Capability Change Notify (\_PR.CPU2, 0x82) // Throttling Capability Change Notify (\_PR.CPU3, 0x80) // Performance Capability Change Notify (\_PR.CPU3, 0x82) // Throttling Capability Change Notify (\_PR.CPU4, 0x80) // Performance Capability Change Notify (\_PR.CPU4, 0x82) // Throttling Capability Change Notify (\_PR.CPU5, 0x80) // Performance Capability Change Notify (\_PR.CPU5, 0x82) // Throttling Capability Change Notify (\_PR.CPU6, 0x80) // Performance Capability Change Notify (\_PR.CPU6, 0x82) // Throttling Capability Change Notify (\_PR.CPU7, 0x80) // Performance Capability Change Notify (\_PR.CPU7, 0x82) // Throttling Capability Change } DBG8 = 0x25 If ((PETE & 0x40)) { \_SB.PCI0.HEC2.CTS0 = TST0 /* \TST0 */ \_SB.PCI0.HEC2.CTS1 = TST1 /* \TST1 */ \_SB.PCI0.HEC2.CTS2 = TST2 /* \TST2 */ \_SB.PCI0.HEC2.CTS3 = TST3 /* \TST3 */ \_SB.PCI0.HEC2.CTS4 = TST4 /* \TST4 */ \_SB.PCI0.HEC2.CTS5 = TST5 /* \TST5 */ \_SB.PCI0.HEC2.CTS6 = TST6 /* \TST6 */ \_SB.PCI0.HEC2.CTS7 = TST7 /* \TST7 */ } If ((PETE & 0x80)) { \_SB.PCI0.HEC2.CPS0 = PST0 /* \PST0 */ \_SB.PCI0.HEC2.CPS1 = PST1 /* \PST1 */ \_SB.PCI0.HEC2.CPS2 = PST2 /* \PST2 */ \_SB.PCI0.HEC2.CPS3 = PST3 /* \PST3 */ \_SB.PCI0.HEC2.CPS4 = PST4 /* \PST4 */ \_SB.PCI0.HEC2.CPS5 = PST5 /* \PST5 */ \_SB.PCI0.HEC2.CPS6 = PST6 /* \PST6 */ \_SB.PCI0.HEC2.CPS7 = PST7 /* \PST7 */ } DBG8 = 0x26 \_SB.PCI0.HEC2.CBWW = Local1 \_SB.PCI0.HEC2.CBWW = (Local0 | (PETE & 0xFF)) \_SB.PCI0.HEC2.HIG = One } If (((Local0 & 0xFF) == 0x03)) { If (PURE) { PURA = Local0 Notify (\_SB.PRAD, 0x80) // Status Change } Else { \_SB.PCI0.HEC2.DCNF (Local0) } } } } } } } } Device (_SB.PCI0.LPCB.TPM) { Method (_HID, 0, NotSerialized) // _HID: Hardware ID { If (TCMF){} Else { Return (0x310CD041) } } Name (_STR, Unicode ("TPM 1.2 Device")) // _STR: Description String Name (_UID, One) // _UID: Unique ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadOnly, 0xFED40000, // Address Base 0x00005000, // Address Length ) }) OperationRegion (TMMB, SystemMemory, 0xFED40000, 0x5000) Field (TMMB, ByteAcc, Lock, Preserve) { ACCS, 8, Offset (0x18), TSTA, 8, TBCA, 8, Offset (0xF00), TVID, 16, TDID, 16 } Method (_STA, 0, NotSerialized) // _STA: Status { If (TPMF) { Return (0x0F) } Return (Zero) } } Scope (_SB.PCI0.LPCB.TPM) { OperationRegion (ASMI, SystemIO, SMIA, One) Field (ASMI, ByteAcc, NoLock, Preserve) { INQ, 8 } OperationRegion (BSMI, SystemIO, SMIB, One) Field (BSMI, ByteAcc, NoLock, Preserve) { DAT, 8 } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653") /* Physical Presence Interface */)) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (0x02) { 0xFF, 0x01 // .. }) } Case (One) { Return ("1.2") } Case (0x02) { ToInteger (DerefOf (Arg3 [Zero]), TMF2) /* \TMF2 */ TMF1 = 0x12 DAT = TMF1 /* \TMF1 */ INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { Return (0x02) } DAT = TMF2 /* \TMF2 */ INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { Return (0x02) } If ((DAT == 0xF1)) { Return (One) } Return (Zero) } Case (0x03) { Name (PPI1, Package (0x02) { Zero, Zero }) DAT = 0x11 INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { Return (One) } PPI1 [One] = DAT /* \_SB_.PCI0.LPCB.TPM_.DAT_ */ Return (PPI1) /* \_SB_.PCI0.LPCB.TPM_._DSM.PPI1 */ } Case (0x04) { Return (TRST) /* \TRST */ } Case (0x05) { Name (PPI2, Package (0x03) { Zero, Zero, Zero }) DAT = 0x21 INQ = OFST /* \OFST */ PPI2 [One] = DAT /* \_SB_.PCI0.LPCB.TPM_.DAT_ */ If ((DAT == 0xFF)) { Return (0x02) } DAT = 0x31 INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { Return (0x02) } If ((DAT == 0xF0)) { DAT = 0x51 INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { PPI2 [0x02] = 0xFFFFFFF0 Return (PPI2) /* \_SB_.PCI0.LPCB.TPM_._DSM.PPI2 */ } } ElseIf ((DAT == 0xF1)) { DAT = 0x51 INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { PPI2 [0x02] = 0xFFFFFFF1 Return (PPI2) /* \_SB_.PCI0.LPCB.TPM_._DSM.PPI2 */ } } Else { PPI2 [0x02] = DAT /* \_SB_.PCI0.LPCB.TPM_.DAT_ */ } Return (PPI2) /* \_SB_.PCI0.LPCB.TPM_._DSM.PPI2 */ } Case (0x06) { Return (0x03) } Case (0x07) { ToInteger (DerefOf (Arg3 [Zero]), TMF2) /* \TMF2 */ TMF1 = 0x12 DAT = TMF1 /* \TMF1 */ INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { Return (0x02) } DAT = TMF2 /* \TMF2 */ INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { Return (0x02) } If ((DAT == 0xF1)) { Return (One) } Return (Zero) } Case (0x08) { ToInteger (DerefOf (Arg3 [Zero]), TMF2) /* \TMF2 */ TMF1 = 0x43 DAT = TMF1 /* \TMF1 */ INQ = OFST /* \OFST */ DAT = TMF2 /* \TMF2 */ INQ = OFST /* \OFST */ Return (DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */ } Default { } } } ElseIf ((Arg0 == ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d"))) { Switch (ToInteger (Arg2)) { Case (Zero) { Return (Buffer (One) { 0x03 // . }) } Case (One) { TMF1 = 0x22 DAT = TMF1 /* \TMF1 */ INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { Return (0x02) } ToInteger (DerefOf (Arg3 [Zero]), TMF1) /* \TMF1 */ DAT = TMF1 /* \TMF1 */ INQ = OFST /* \OFST */ If ((DAT == 0xFF)) { Return (0x02) } Return (Zero) } Default { } } } Return (Buffer (One) { 0x00 // . }) } } Method (WOSC, 4, NotSerialized) { CreateDWordField (Arg3, Zero, CDW1) If ((Arg0 == ToUUID ("ed855e0c-6c90-47bf-a62a-26de0fc5ad5c"))) { CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) If (WHEA) { If ((CDW2 & One)) { Return (One) } } } Else { CDW1 |= 0x04 } Return (Zero) } Scope (_SI) { OperationRegion (LEDI, SystemIO, LEDB, One) Field (LEDI, AnyAcc, NoLock, Preserve) { GPIB, 8 } Method (_SST, 1, NotSerialized) // _SST: System Status { If (LEDB) { If ((Arg0 == One)) { GPIB &= ~LEDV } If ((Arg0 == 0x03)) { GPIB |= LEDV /* \LEDV */ } } } Method (_MSG, 1, NotSerialized) // _MSG: Message { Noop } } Name (CDN, Zero) Scope (_SB.PCI0.LAN2) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If (((Arg1 >= 0x02) && (Arg2 == Zero))) { If ((CDN == Zero)) { Return (Buffer (One) { 0x00 // . }) } Else { Return (Buffer (One) { 0x81 // . }) } } If (((Arg1 >= 0x02) && (Arg2 == 0x07))) { If ((CDN == Zero)) { Return (Buffer (One) { 0x00 // . }) } Else { Return (Package (0x02) { 0x03, Unicode ("Onboard LAN 2") }) } } } Return (Buffer (One) { 0x00 // . }) } } Scope (_SB.PCI0.P0PA) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If (((Arg1 >= 0x02) && (Arg2 == Zero))) { If ((CDN == Zero)) { Return (Buffer (One) { 0x00 // . }) } Else { Return (Buffer (One) { 0x81 // . }) } } If (((Arg1 >= 0x02) && (Arg2 == 0x07))) { If ((CDN == Zero)) { Return (Buffer (One) { 0x00 // . }) } Else { Return (Package (0x02) { 0x06, Unicode ("Slot 3") }) } } } Return (Buffer (One) { 0x00 // . }) } } Scope (_SB.PCI0.P0P2) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { If (((Arg1 >= 0x02) && (Arg2 == Zero))) { If ((CDN == Zero)) { Return (Buffer (One) { 0x00 // . }) } Else { Return (Buffer (One) { 0x81 // . }) } } If (((Arg1 >= 0x02) && (Arg2 == 0x07))) { If ((CDN == Zero)) { Return (Buffer (One) { 0x00 // . }) } Else { Return (Package (0x02) { 0x07, Unicode ("Slot 4") }) } } } Return (Buffer (One) { 0x00 // . }) } } Scope (\) { Name (PDSM, Package (0x05) { Package (0x04) { One, Unicode ("Onboard Video"), Zero, 0x04128086 }, Package (0x04) { 0x02, Unicode ("Onboard LAN 1"), Zero, 0x8C148086 }, Package (0x04) { 0x04, Unicode ("Slot 1"), One, Ones }, Package (0x04) { 0x05, Unicode ("Slot 2"), 0x02, Ones }, Package (0x04) { Ones, Unicode ("Last Entry"), Ones, Ones } }) } Scope (_SB) { Device (PWRB) { Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID Name (OPRW, Package (0x02) { 0x1E, 0x04 }) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } } } Scope (_SB.PCI0.LPCB) { Device (H_EC) { Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { ^^^GFX0.CLID = 0x03 Return (Zero) } Name (B1CC, Zero) Name (B1ST, Zero) Name (B2CC, Zero) Name (B2ST, Zero) Name (CFAN, Zero) Name (CMDR, Zero) Name (DOCK, Zero) Name (EJET, Zero) Name (MCAP, Zero) Name (PLMX, Zero) Name (PECH, Zero) Name (PECL, Zero) Name (PENV, Zero) Name (PINV, Zero) Name (PPSH, Zero) Name (PPSL, Zero) Name (PSTP, Zero) Name (RPWR, Zero) Name (LIDS, Zero) Name (LSTE, Zero) Name (SLPC, Zero) Name (VPWR, Zero) Name (WTMS, Zero) Name (AWT2, Zero) Name (AWT1, Zero) Name (AWT0, Zero) Name (DLED, Zero) Name (IBT1, Zero) Name (ECAV, Zero) Name (SPT2, Zero) Name (PB10, Zero) Method (ECRD, 1, Serialized) { Return (DerefOf (Arg0)) } Method (ECWT, 2, Serialized) { Arg1 = Arg0 } Method (ECMD, 1, Serialized) { If (ECON) { While (CMDR) { Stall (0x14) } CMDR = Arg0 } } Device (BAT0) { Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (Zero) } } Scope (\) { Field (GNVS, AnyAcc, Lock, Preserve) { Offset (0x1E), BNUM, 8, Offset (0x20), B1SC, 8, Offset (0x23), B1SS, 8 } } Device (BAT1) { Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (Zero) } } Scope (\) { Field (GNVS, AnyAcc, Lock, Preserve) { Offset (0x21), B2SC, 8, Offset (0x24), B2SS, 8 } } Device (BAT2) { Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (Zero) } } } } Device (_SB.PCI0.DOCK) { Name (_HID, "ABCD0000") // _HID: Hardware ID Name (_CID, EisaId ("PNP0C15") /* Docking Station */) // _CID: Compatible ID Name (_UID, 0x02) // _UID: Unique ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (Zero) } } Scope (_SB) { Device (LID0) { Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID Method (_STA, 0, NotSerialized) // _STA: Status { Return (Zero) } } } Name (_S0, Package (0x04) // _S0_: S0 System State { Zero, Zero, Zero, Zero }) If (SS4) { Name (_S4, Package (0x04) // _S4_: S4 System State { 0x06, Zero, Zero, Zero }) } Name (_S5, Package (0x04) // _S5_: S5 System State { 0x07, Zero, Zero, Zero }) Method (PTS, 1, NotSerialized) { If (Arg0) { \_SB.PCI0.LPCB.SPTS (Arg0) \_SB.PCI0.NPTS (Arg0) \_SB.PCI0.HEC2.MPTS () } } Method (WAK, 1, NotSerialized) { \_SB.PCI0.LPCB.SWAK (Arg0) \_SB.PCI0.NWAK (Arg0) \_SB.PCI0.HEC2.MWAK () } Method (OSCM, 4, NotSerialized) { If (MOSC (Arg0, Arg1, Arg2, Arg3)) { Return (One) } If (WOSC (Arg0, Arg1, Arg3, Arg3)) { Return (One) } Return (Zero) } Method (PINI, 0, NotSerialized) { } Scope (\_PR.CPU0) { Name (_PPC, Zero) // _PPC: Performance Present Capabilities Method (_PCT, 0, NotSerialized) // _PCT: Performance Control { \_PR.CPU0._PPC = \_PR.CPPC If (((CFGD & One) && (PDC0 & One))) { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } } Name (_PSS, Package (0x10) // _PSS: Performance Supported States { Package (0x06) { 0x00000CE5, 0x00014820, 0x0000000A, 0x0000000A, 0x00002500, 0x00002500 }, Package (0x06) { 0x00000CE4, 0x00014820, 0x0000000A, 0x0000000A, 0x00002100, 0x00002100 }, Package (0x06) { 0x00000C1C, 0x00012A3D, 0x0000000A, 0x0000000A, 0x00001F00, 0x00001F00 }, Package (0x06) { 0x00000B54, 0x00011099, 0x0000000A, 0x0000000A, 0x00001D00, 0x00001D00 }, Package (0x06) { 0x00000AF0, 0x00010423, 0x0000000A, 0x0000000A, 0x00001C00, 0x00001C00 }, Package (0x06) { 0x00000A28, 0x0000EBF8, 0x0000000A, 0x0000000A, 0x00001A00, 0x00001A00 }, Package (0x06) { 0x00000960, 0x0000D4AD, 0x0000000A, 0x0000000A, 0x00001800, 0x00001800 }, Package (0x06) { 0x00000898, 0x0000BE56, 0x0000000A, 0x0000000A, 0x00001600, 0x00001600 }, Package (0x06) { 0x000007D0, 0x0000A8DA, 0x0000000A, 0x0000000A, 0x00001400, 0x00001400 }, Package (0x06) { 0x0000076C, 0x00009E70, 0x0000000A, 0x0000000A, 0x00001300, 0x00001300 }, Package (0x06) { 0x000006A4, 0x00008A45, 0x0000000A, 0x0000000A, 0x00001100, 0x00001100 }, Package (0x06) { 0x000005DC, 0x000076FD, 0x0000000A, 0x0000000A, 0x00000F00, 0x00000F00 }, Package (0x06) { 0x00000514, 0x00006485, 0x0000000A, 0x0000000A, 0x00000D00, 0x00000D00 }, Package (0x06) { 0x000004B0, 0x00005B99, 0x0000000A, 0x0000000A, 0x00000C00, 0x00000C00 }, Package (0x06) { 0x000003E8, 0x00004A63, 0x0000000A, 0x0000000A, 0x00000A00, 0x00000A00 }, Package (0x06) { 0x00000320, 0x000039F5, 0x0000000A, 0x0000000A, 0x00000800, 0x00000800 } }) Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Package (0x06) { 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000 } Name (PSDF, Zero) Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies { If (!PSDF) { DerefOf (HPSD [Zero]) [0x04] = TCNT /* \TCNT */ DerefOf (SPSD [Zero]) [0x04] = TCNT /* \TCNT */ PSDF = Ones } If ((PDC0 & 0x0800)) { Return (HPSD) /* \_PR_.CPU0.HPSD */ } Return (SPSD) /* \_PR_.CPU0.SPSD */ } Name (HPSD, Package (0x01) { Package (0x05) { 0x05, Zero, Zero, 0xFE, 0x80 } }) Name (SPSD, Package (0x01) { Package (0x05) { 0x05, Zero, Zero, 0xFC, 0x80 } }) } Scope (\) { Name (SSDT, Package (0x0C) { "CPU0IST ", 0xD801EA98, 0x00000539, "APIST ", 0xDA042618, 0x000005AA, "CPU0CST ", 0xDA042C18, 0x000003D3, "APCST ", 0xDA041D98, 0x00000119 }) Name (\PDC0, 0x80000000) Name (\PDC1, 0x80000000) Name (\PDC2, 0x80000000) Name (\PDC3, 0x80000000) Name (\PDC4, 0x80000000) Name (\PDC5, 0x80000000) Name (\PDC6, 0x80000000) Name (\PDC7, 0x80000000) Name (\SDTL, Zero) } Scope (\_PR) { OperationRegion (PPMT, SystemMemory, 0xDA80CF98, 0x003A) Field (PPMT, AnyAcc, Lock, Preserve) { PGRV, 8, CFGD, 32, Offset (0x06), ACRT, 8, APSV, 8, AAC0, 8, CPID, 32, CPPC, 8, CCTP, 8, CLVL, 8, CBMI, 8, PL10, 16, PL20, 16, PLW0, 8, CTC0, 8, TAR0, 8, PPC0, 8, PL11, 16, PL21, 16, PLW1, 8, CTC1, 8, TAR1, 8, PPC1, 8, PL12, 16, PL22, 16, PLW2, 8, CTC2, 8, TAR2, 8, PPC2, 8, C3MW, 8, C6MW, 8, C7MW, 8, CDMW, 8, C3LT, 16, C6LT, 16, C7LT, 16, CDLT, 16, CDLV, 16, CDPW, 16, MPMF, 8 } } Scope (\_PR.CPU0) { Name (HI0, Zero) Name (HC0, Zero) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { If (CondRefOf (\_PR.CPU0._PPC)) { \_PR.CPU0._PPC = CPPC /* \_PR_.CPPC */ } Local0 = CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (CPDC, 1, NotSerialized) { CreateDWordField (Arg0, Zero, REVS) CreateDWordField (Arg0, 0x04, SIZE) Local0 = SizeOf (Arg0) Local1 = (Local0 - 0x08) CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP) Name (STS0, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 // .... }) Concatenate (STS0, TEMP, Local2) Return (COSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)) } Method (COSC, 4, NotSerialized) { CreateDWordField (Arg3, Zero, STS0) CreateDWordField (Arg3, 0x04, CAP0) CreateDWordField (Arg0, Zero, IID0) CreateDWordField (Arg0, 0x04, IID1) CreateDWordField (Arg0, 0x08, IID2) CreateDWordField (Arg0, 0x0C, IID3) Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953")) CreateDWordField (UID0, Zero, EID0) CreateDWordField (UID0, 0x04, EID1) CreateDWordField (UID0, 0x08, EID2) CreateDWordField (UID0, 0x0C, EID3) If (!(((IID0 == EID0) && (IID1 == EID1)) && (( IID2 == EID2) && (IID3 == EID3)))) { STS0 = 0x06 Return (Arg3) } If ((Arg1 != One)) { STS0 = 0x0A Return (Arg3) } Return (Arg3) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS0) CreateDWordField (Arg0, 0x04, CAP0) If (((STS0 == 0x06) || (STS0 == 0x0A))) { Return (Zero) } If ((STS0 & One)) { CAP0 &= 0x0BFF Return (Zero) } PDC0 = ((PDC0 & 0x7FFFFFFF) | CAP0) /* \_PR_.CPU0.GCAP.CAP0 */ If ((CFGD & 0x7A)) { If ((((CFGD & 0x0200) && (PDC0 & 0x18)) && ! (SDTL & 0x02))) { SDTL |= 0x02 OperationRegion (CST0, SystemMemory, DerefOf (SSDT [0x07]), DerefOf (SSDT [0x08])) Load (CST0, HC0) /* \_PR_.CPU0.HC0_ */ } } Return (Zero) } } Scope (\_PR.CPU1) { Name (HI1, Zero) Name (HC1, Zero) Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS1) CreateDWordField (Arg0, 0x04, CAP1) If (((STS1 == 0x06) || (STS1 == 0x0A))) { Return (Zero) } If ((STS1 & One)) { CAP1 &= 0x0BFF Return (Zero) } PDC1 = ((PDC1 & 0x7FFFFFFF) | CAP1) /* \_PR_.CPU1.GCAP.CAP1 */ If (((PDC1 & 0x09) == 0x09)) { APPT () } If ((PDC1 & 0x18)) { APCT () } PDC0 = PDC1 /* \PDC1 */ Return (Zero) } Method (APCT, 0, NotSerialized) { If (((CFGD & 0x0200) && ((CFGD & 0x7A) && ! (SDTL & 0x20)))) { SDTL |= 0x20 OperationRegion (CST1, SystemMemory, DerefOf (SSDT [0x0A]), DerefOf (SSDT [0x0B])) Load (CST1, HC1) /* \_PR_.CPU1.HC1_ */ } } Method (APPT, 0, NotSerialized) { If (((CFGD & 0x0200) && ((CFGD & One) && ! (SDTL & 0x10)))) { SDTL |= 0x10 OperationRegion (IST1, SystemMemory, DerefOf (SSDT [0x04]), DerefOf (SSDT [0x05])) Load (IST1, HI1) /* \_PR_.CPU1.HI1_ */ } } } Scope (\_PR.CPU2) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS2) CreateDWordField (Arg0, 0x04, CAP2) If (((STS2 == 0x06) || (STS2 == 0x0A))) { Return (Zero) } If ((STS2 & One)) { CAP2 &= 0x0BFF Return (Zero) } PDC2 = ((PDC2 & 0x7FFFFFFF) | CAP2) /* \_PR_.CPU2.GCAP.CAP2 */ If (((PDC2 & 0x09) == 0x09)) { \_PR.CPU1.APPT () } If ((PDC2 & 0x18)) { \_PR.CPU1.APCT () } PDC0 = PDC2 /* \PDC2 */ Return (Zero) } } Scope (\_PR.CPU3) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS3) CreateDWordField (Arg0, 0x04, CAP3) If (((STS3 == 0x06) || (STS3 == 0x0A))) { Return (Zero) } If ((STS3 & One)) { CAP3 &= 0x0BFF Return (Zero) } PDC3 = ((PDC3 & 0x7FFFFFFF) | CAP3) /* \_PR_.CPU3.GCAP.CAP3 */ If (((PDC3 & 0x09) == 0x09)) { \_PR.CPU1.APPT () } If ((PDC3 & 0x18)) { \_PR.CPU1.APCT () } PDC0 = PDC3 /* \PDC3 */ Return (Zero) } } Scope (\_PR.CPU4) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS4) CreateDWordField (Arg0, 0x04, CAP4) If (((STS4 == 0x06) || (STS4 == 0x0A))) { Return (Zero) } If ((STS4 & One)) { CAP4 &= 0x0BFF Return (Zero) } PDC4 = ((PDC4 & 0x7FFFFFFF) | CAP4) /* \_PR_.CPU4.GCAP.CAP4 */ If (((PDC4 & 0x09) == 0x09)) { \_PR.CPU1.APPT () } If ((PDC4 & 0x18)) { \_PR.CPU1.APCT () } PDC0 = PDC4 /* \PDC4 */ Return (Zero) } } Scope (\_PR.CPU5) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS5) CreateDWordField (Arg0, 0x04, CAP5) If (((STS5 == 0x06) || (STS5 == 0x0A))) { Return (Zero) } If ((STS5 & One)) { CAP5 &= 0x0BFF Return (Zero) } PDC5 = ((PDC5 & 0x7FFFFFFF) | CAP5) /* \_PR_.CPU5.GCAP.CAP5 */ If (((PDC5 & 0x09) == 0x09)) { \_PR.CPU1.APPT () } If ((PDC5 & 0x18)) { \_PR.CPU1.APCT () } PDC0 = PDC5 /* \PDC5 */ Return (Zero) } } Scope (\_PR.CPU6) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS6) CreateDWordField (Arg0, 0x04, CAP6) If (((STS6 == 0x06) || (STS6 == 0x0A))) { Return (Zero) } If ((STS6 & One)) { CAP6 &= 0x0BFF Return (Zero) } PDC6 = ((PDC6 & 0x7FFFFFFF) | CAP6) /* \_PR_.CPU6.GCAP.CAP6 */ If (((PDC6 & 0x09) == 0x09)) { \_PR.CPU1.APPT () } If ((PDC6 & 0x18)) { \_PR.CPU1.APCT () } PDC0 = PDC6 /* \PDC6 */ Return (Zero) } } Scope (\_PR.CPU7) { Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities { Local0 = \_PR.CPU0.CPDC (Arg0) GCAP (Local0) Return (Local0) } Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { Local0 = \_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3) GCAP (Local0) Return (Local0) } Method (GCAP, 1, NotSerialized) { CreateDWordField (Arg0, Zero, STS7) CreateDWordField (Arg0, 0x04, CAP7) If (((STS7 == 0x06) || (STS7 == 0x0A))) { Return (Zero) } If ((STS7 & One)) { CAP7 &= 0x0BFF Return (Zero) } PDC7 = ((PDC7 & 0x7FFFFFFF) | CAP7) /* \_PR_.CPU7.GCAP.CAP7 */ If (((PDC7 & 0x09) == 0x09)) { \_PR.CPU1.APPT () } If ((PDC7 & 0x18)) { \_PR.CPU1.APCT () } PDC0 = PDC7 /* \PDC7 */ Return (Zero) } } Scope (\) { Name (STFE, Buffer (0x07) { 0x10, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF // ....... }) Name (STFD, Buffer (0x07) { 0x90, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF // ....... }) Name (FZTF, Buffer (0x07) { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF5 // ....... }) Name (DCFL, Buffer (0x07) { 0xC1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB1 // ....... }) Name (SCBF, Buffer (0x15){}) Name (CMDC, Zero) Method (GTFB, 2, Serialized) { Local0 = (CMDC * 0x38) CreateField (SCBF, Local0, 0x38, CMDX) Local0 = (CMDC * 0x07) CreateByteField (SCBF, (Local0 + One), A001) CMDX = Arg0 A001 = Arg1 CMDC++ } } Scope (\_SB.PCI0.SAT0) { Name (REGF, One) Method (_REG, 2, NotSerialized) // _REG: Region Availability { If ((Arg0 == 0x02)) { REGF = Arg1 } } Name (TMD0, Buffer (0x14){}) CreateDWordField (TMD0, Zero, PIO0) CreateDWordField (TMD0, 0x04, DMA0) CreateDWordField (TMD0, 0x08, PIO1) CreateDWordField (TMD0, 0x0C, DMA1) CreateDWordField (TMD0, 0x10, CHNF) Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { PIO0 = 0x78 DMA0 = 0x14 PIO1 = 0x78 DMA1 = 0x14 CHNF |= 0x05 Return (TMD0) /* \_SB_.PCI0.SAT0.TMD0 */ } Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { } Device (SPT0) { Name (_ADR, 0xFFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT1) { Name (_ADR, 0x0001FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT2) { Name (_ADR, 0x0002FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT3) { Name (_ADR, 0x0003FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT4) { Name (_ADR, 0x0004FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } Device (SPT5) { Name (_ADR, 0x0005FFFF) // _ADR: Address Method (_GTF, 0, NotSerialized) // _GTF: Get Task File { CMDC = Zero If ((DSSP || FHPP)) { GTFB (STFD, 0x06) } Else { GTFB (STFE, 0x06) } GTFB (FZTF, Zero) GTFB (DCFL, Zero) Return (SCBF) /* \SCBF */ } } } OperationRegion (SANV, SystemMemory, 0xDA80BE18, 0x016D) Field (SANV, AnyAcc, Lock, Preserve) { SARV, 32, ASLB, 32, IMON, 8, IGDS, 8, CADL, 8, PADL, 8, CSTE, 16, NSTE, 16, DID9, 32, DIDA, 32, DIDB, 32, IBTT, 8, IPAT, 8, IPSC, 8, IBLC, 8, IBIA, 8, ISSC, 8, IPCF, 8, IDMS, 8, IF1E, 8, HVCO, 8, NXD1, 32, NXD2, 32, NXD3, 32, NXD4, 32, NXD5, 32, NXD6, 32, NXD7, 32, NXD8, 32, GSMI, 8, PAVP, 8, LIDS, 8, KSV0, 32, KSV1, 8, BBAR, 32, BLCS, 8, BRTL, 8, ALSE, 8, ALAF, 8, LLOW, 8, LHIH, 8, ALFP, 8, AUDA, 32, AUDB, 32, AUDC, 32, DIDC, 32, DIDD, 32, DIDE, 32, DIDF, 32, CCSA, 32, CCNT, 32, Offset (0xC8), SGMD, 8, SGFL, 8, PWOK, 8, HLRS, 8, PWEN, 8, PRST, 8, CPSP, 32, EECP, 8, EVCP, 16, XBAS, 32, GBAS, 16, SGGP, 8, NVGA, 32, NVHA, 32, AMDA, 32, NDID, 8, DID1, 32, DID2, 32, DID3, 32, DID4, 32, DID5, 32, DID6, 32, DID7, 32, DID8, 32, OBS1, 32, OBS2, 32, OBS3, 32, OBS4, 32, OBS5, 32, OBS6, 32, OBS7, 32, OBS8, 32, LTRA, 8, OBFA, 8, LTRB, 8, OBFB, 8, LTRC, 8, OBFC, 8, SMSL, 16, SNSL, 16, P0UB, 8, P1UB, 8, P2UB, 8, EDPV, 8, NXDX, 32, DIDX, 32, PCSL, 8, SC7A, 8, DSEL, 8, ESEL, 8, PSEL, 8, MXD1, 32, MXD2, 32, MXD3, 32, MXD4, 32, MXD5, 32, MXD6, 32, MXD7, 32, MXD8, 32, PXFD, 8, EBAS, 32, HYSS, 32 } Scope (\_SB.PCI0) { Name (LTRS, Zero) Name (OBFS, Zero) Device (PEG0) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (PEGR, PCI_Config, 0xC0, 0x30) Field (PEGR, DWordAcc, NoLock, Preserve) { Offset (0x02), PSTS, 1, Offset (0x2C), GENG, 1, , 1, PMEG, 1 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { GENG = One PMEG = One } Else { GENG = Zero PMEG = Zero } } Method (HPME, 0, Serialized) { PSTS = One } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR02 ()) } Return (PR02 ()) } Method (_INI, 0, NotSerialized) // _INI: Initialize { LTRS = LTRA /* \LTRA */ OBFS = OBFA /* \OBFA */ } Name (LTRV, Package (0x04) { Zero, Zero, Zero, Zero }) Name (OPTS, Zero) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Switch (ToInteger (Arg0)) { Case (ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */){ Switch (ToInteger (Arg2)) { Case (Zero) { If ((Arg1 == 0x02)) { OPTS = One If (LTRS) { OPTS |= 0x40 } If (OBFS) { OPTS |= 0x10 } Return (OPTS) /* \_SB_.PCI0.PEG0.OPTS */ } Else { Return (Zero) } } Case (0x04) { If ((Arg1 == 0x02)) { If (OBFS) { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ }) } Else { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } } } Case (0x06) { If ((Arg1 == 0x02)) { If (LTRS) { LTRV [Zero] = ((SMSL >> 0x0A) & 0x07) LTRV [One] = (SMSL & 0x03FF) LTRV [0x02] = ((SNSL >> 0x0A) & 0x07) LTRV [0x03] = (SNSL & 0x03FF) Return (LTRV) /* \_SB_.PCI0.PEG0.LTRV */ } Else { Return (Zero) } } } } } } Return (Buffer (One) { 0x00 // . }) } Device (PEGP) { Name (_ADR, Zero) // _ADR: Address Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } } } Device (PEG1) { Name (_ADR, 0x00010001) // _ADR: Address OperationRegion (PEGR, PCI_Config, 0xC0, 0x30) Field (PEGR, DWordAcc, NoLock, Preserve) { Offset (0x02), PSTS, 1, Offset (0x2C), GENG, 1, , 1, PMEG, 1 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { GENG = One PMEG = One } Else { GENG = Zero PMEG = Zero } } Method (HPME, 0, Serialized) { PSTS = One } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR0A ()) } Return (PR0A ()) } Method (_INI, 0, NotSerialized) // _INI: Initialize { LTRS = LTRB /* \LTRB */ OBFS = OBFB /* \OBFB */ } Name (LTRV, Package (0x04) { Zero, Zero, Zero, Zero }) Name (OPTS, Zero) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Switch (ToInteger (Arg0)) { Case (ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */){ Switch (ToInteger (Arg2)) { Case (Zero) { If ((Arg1 == 0x02)) { OPTS = One If (LTRS) { OPTS |= 0x40 } If (OBFS) { OPTS |= 0x10 } Return (OPTS) /* \_SB_.PCI0.PEG1.OPTS */ } Else { Return (Zero) } } Case (0x04) { If ((Arg1 == 0x02)) { If (OBFS) { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ }) } Else { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } } } Case (0x06) { If ((Arg1 == 0x02)) { If (LTRS) { LTRV [Zero] = ((SMSL >> 0x0A) & 0x07) LTRV [One] = (SMSL & 0x03FF) LTRV [0x02] = ((SNSL >> 0x0A) & 0x07) LTRV [0x03] = (SNSL & 0x03FF) Return (LTRV) /* \_SB_.PCI0.PEG1.LTRV */ } Else { Return (Zero) } } } } } } Return (Buffer (One) { 0x00 // . }) } } Device (PEG2) { Name (_ADR, 0x00010002) // _ADR: Address OperationRegion (PEGR, PCI_Config, 0xC0, 0x30) Field (PEGR, DWordAcc, NoLock, Preserve) { Offset (0x02), PSTS, 1, Offset (0x2C), GENG, 1, , 1, PMEG, 1 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x09, 0x04)) } Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { GENG = One PMEG = One } Else { GENG = Zero PMEG = Zero } } Method (HPME, 0, Serialized) { PSTS = One } Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (AR0B ()) } Return (PR0B ()) } Method (_INI, 0, NotSerialized) // _INI: Initialize { LTRS = LTRC /* \LTRC */ OBFS = OBFC /* \OBFC */ } Name (LTRV, Package (0x04) { Zero, Zero, Zero, Zero }) Name (OPTS, Zero) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { Switch (ToInteger (Arg0)) { Case (ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */){ Switch (ToInteger (Arg2)) { Case (Zero) { If ((Arg1 == 0x02)) { OPTS = One If (LTRS) { OPTS |= 0x40 } If (OBFS) { OPTS |= 0x10 } Return (OPTS) /* \_SB_.PCI0.PEG2.OPTS */ } Else { Return (Zero) } } Case (0x04) { If ((Arg1 == 0x02)) { If (OBFS) { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 // ........ }) } Else { Return (Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........ }) } } } Case (0x06) { If ((Arg1 == 0x02)) { If (LTRS) { LTRV [Zero] = ((SMSL >> 0x0A) & 0x07) LTRV [One] = (SMSL & 0x03FF) LTRV [0x02] = ((SNSL >> 0x0A) & 0x07) LTRV [0x03] = (SNSL & 0x03FF) Return (LTRV) /* \_SB_.PCI0.PEG2.LTRV */ } Else { Return (Zero) } } } } } } Return (Buffer (One) { 0x00 // . }) } } Device (B0D3) { Name (_ADR, 0x00030000) // _ADR: Address Name (BARA, 0x80000000) Name (TBAR, Zero) Name (TCMD, Zero) Name (MODB, Zero) Name (MODC, Zero) Method (_STA, 0, NotSerialized) // _STA: Status { If ((AUVD != 0xFFFF)) { Return (0x0F) } Return (Zero) } Method (_INI, 0, NotSerialized) // _INI: Initialize { If ((((ABAR & 0xFFFFC004) != 0xFFFFC004) && (( ABAR & 0xFFFFC000) != Zero))) { BARA = ABAR /* \_SB_.PCI0.B0D3.ABAR */ } } OperationRegion (RPCS, SystemMemory, \XBAS, 0x00018040) Field (RPCS, AnyAcc, NoLock, Preserve) { Offset (0x18004), ACMD, 8, Offset (0x18010), ABAR, 32 } OperationRegion (RPCZ, PCI_Config, Zero, 0x40) Field (RPCZ, DWordAcc, Lock, Preserve) { AUVD, 16 } Method (ASTR, 0, Serialized) { If ((((ABAR & 0xFFFFC004) != 0xFFFFC004) && (( ABAR & 0xFFFFC000) != Zero))) { BBAR = (ABAR & 0xFFFFFFF0) BBAR += 0x1000 OperationRegion (RPCY, SystemMemory, BBAR, 0x25) Field (RPCY, DWordAcc, NoLock, Preserve) { Offset (0x0C), EM4W, 32, EMWA, 32, Offset (0x1C), ADWA, 32 } EMWA = AUDA /* \AUDA */ ADWA = AUDB /* \AUDB */ EM4W = AUDC /* \AUDC */ } } Method (VSTR, 1, Serialized) { Name (CONT, 0x03E8) Name (ADDR, 0x80000000) ADDR = Arg0 OperationRegion (CCDC, SystemMemory, ADDR, 0x04) Field (CCDC, ByteAcc, NoLock, Preserve) { CDEC, 32 } If ((((ABAR & 0xFFFFC004) != 0xFFFFC004) && (( ABAR & 0xFFFFC000) != Zero))) { If ((CDEC != Zero)) { BBAR = (ABAR & 0xFFFFFFF0) OperationRegion (IPCV, SystemMemory, BBAR, 0x70) Field (IPCV, DWordAcc, NoLock, Preserve) { Offset (0x60), AVIC, 32, Offset (0x68), AIRS, 16 } CONT = 0x03E8 While ((((AIRS & One) == One) && (CONT != Zero))) { Stall (One) CONT-- } AIRS |= 0x02 AVIC = CDEC /* \_SB_.PCI0.B0D3.VSTR.CDEC */ AIRS |= One CONT = 0x03E8 While ((((AIRS & One) == One) && (CONT != Zero))) { Stall (One) CONT-- } } } } Method (CXDC, 0, Serialized) { Name (IDDX, 0x80000000) If (((CCSA != Zero) && (CCNT != Zero))) { IDDX = CCSA /* \CCSA */ While ((IDDX < (CCSA + (CCNT * 0x04)))) { VSTR (IDDX) IDDX += 0x04 } } } Method (ARST, 0, Serialized) { If ((((ABAR & 0xFFFFC004) != 0xFFFFC004) && (( ABAR & 0xFFFFC000) != Zero))) { BBAR = (ABAR & 0xFFFFFFF0) OperationRegion (IPCV, SystemMemory, BBAR, 0xBF) Field (IPCV, AnyAcc, NoLock, Preserve) { Offset (0x08), CRST, 32, Offset (0x4C), CORB, 32, Offset (0x5C), RIRB, 32, Offset (0x80), OSD1, 32, Offset (0xA0), OSD2, 32 } CORB &= 0xFFFFFFFD RIRB &= 0xFFFFFFFD OSD1 &= 0xFFFFFFFD OSD2 &= 0xFFFFFFFD CRST &= 0xFFFFFFFE } } Method (AINI, 0, Serialized) { Name (CONT, 0x03E8) If ((((ABAR & 0xFFFFC004) != 0xFFFFC004) && (( ABAR & 0xFFFFC000) != Zero))) { BBAR = (ABAR & 0xFFFFFFF0) OperationRegion (IPCV, SystemMemory, BBAR, 0x70) Field (IPCV, DWordAcc, NoLock, Preserve) { GCAP, 16, Offset (0x08), GCTL, 32, Offset (0x0E), SSTS, 8, Offset (0x60), AVIC, 32, Offset (0x68), AIRS, 16 } GCTL |= One CONT = 0x03E8 While ((((GCTL & One) == Zero) && (CONT != Zero))) { Stall (One) CONT-- } GCAP &= 0xFFFF SSTS |= 0x0F GCTL &= 0xFFFFFFFE CONT = 0x03E8 While ((((GCTL & One) == One) && (CONT != Zero))) { Stall (One) CONT-- } GCTL |= One CONT = 0x03E8 While ((((GCTL & One) == Zero) && (CONT != Zero))) { Stall (One) CONT-- } } } Method (ABWA, 1, Serialized) { If (Arg0) { If ((((ABAR & 0xFFFFC004) == 0xFFFFC004) || ((ABAR & 0xFFFFC000 ) == Zero))) { If ((BARA != 0x80000000)) { TBAR = ABAR /* \_SB_.PCI0.B0D3.ABAR */ TCMD = ACMD /* \_SB_.PCI0.B0D3.ACMD */ ABAR = BARA /* \_SB_.PCI0.B0D3.BARA */ ACMD = 0x06 MODB = One } } ElseIf (((ACMD & 0x06) != 0x06)) { TCMD = ACMD /* \_SB_.PCI0.B0D3.ACMD */ ACMD = 0x06 MODC = One } } Else { If (MODB) { If ((ABAR == BARA)) { ABAR = TBAR /* \_SB_.PCI0.B0D3.TBAR */ ACMD = TCMD /* \_SB_.PCI0.B0D3.TCMD */ } } If (MODC) { ACMD = TCMD /* \_SB_.PCI0.B0D3.TCMD */ } } } } Device (GFX0) { Name (_ADR, 0x00020000) // _ADR: Address Method (_DEP, 0, NotSerialized) // _DEP: Dependencies { ADBG ("GFX0 DEP Call") If ((S0ID == One)) { ADBG ("GFX0 DEP") Return (Package (0x01) { \_SB.PEPD }) } Else { ADBG ("GFX0 DEP NULL") Return (Package (0x00){}) } } Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching { DSEN = (Arg0 & 0x07) If (((Arg0 & 0x03) == Zero)) { If (CondRefOf (HDOS)) { HDOS () } } } Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices { If (CondRefOf (IDAB)) { IDAB () } Else { NDID = Zero If ((DIDL != Zero)) { DID1 = SDDL (DIDL) } If ((DDL2 != Zero)) { DID2 = SDDL (DDL2) } If ((DDL3 != Zero)) { DID3 = SDDL (DDL3) } If ((DDL4 != Zero)) { DID4 = SDDL (DDL4) } If ((DDL5 != Zero)) { DID5 = SDDL (DDL5) } If ((DDL6 != Zero)) { DID6 = SDDL (DDL6) } If ((DDL7 != Zero)) { DID7 = SDDL (DDL7) } If ((DDL8 != Zero)) { DID8 = SDDL (DDL8) } If ((DDL9 != Zero)) { DID9 = SDDL (DDL9) } If ((DD10 != Zero)) { DIDA = SDDL (DD10) } If ((DD11 != Zero)) { DIDB = SDDL (DD11) } If ((DD12 != Zero)) { DIDC = SDDL (DD12) } If ((DD13 != Zero)) { DIDD = SDDL (DD13) } If ((DD14 != Zero)) { DIDE = SDDL (DD14) } If ((DD15 != Zero)) { DIDF = SDDL (DD15) } } If ((NDID == One)) { Name (TMP1, Package (0x01) { Ones }) TMP1 [Zero] = (0x00010000 | DID1) Return (TMP1) /* \_SB_.PCI0.GFX0._DOD.TMP1 */ } If ((NDID == 0x02)) { Name (TMP2, Package (0x02) { Ones, Ones }) TMP2 [Zero] = (0x00010000 | DID1) TMP2 [One] = (0x00010000 | DID2) Return (TMP2) /* \_SB_.PCI0.GFX0._DOD.TMP2 */ } If ((NDID == 0x03)) { Name (TMP3, Package (0x03) { Ones, Ones, Ones }) TMP3 [Zero] = (0x00010000 | DID1) TMP3 [One] = (0x00010000 | DID2) TMP3 [0x02] = (0x00010000 | DID3) Return (TMP3) /* \_SB_.PCI0.GFX0._DOD.TMP3 */ } If ((NDID == 0x04)) { Name (TMP4, Package (0x04) { Ones, Ones, Ones, Ones }) TMP4 [Zero] = (0x00010000 | DID1) TMP4 [One] = (0x00010000 | DID2) TMP4 [0x02] = (0x00010000 | DID3) TMP4 [0x03] = (0x00010000 | DID4) Return (TMP4) /* \_SB_.PCI0.GFX0._DOD.TMP4 */ } If ((NDID == 0x05)) { Name (TMP5, Package (0x05) { Ones, Ones, Ones, Ones, Ones }) TMP5 [Zero] = (0x00010000 | DID1) TMP5 [One] = (0x00010000 | DID2) TMP5 [0x02] = (0x00010000 | DID3) TMP5 [0x03] = (0x00010000 | DID4) TMP5 [0x04] = (0x00010000 | DID5) Return (TMP5) /* \_SB_.PCI0.GFX0._DOD.TMP5 */ } If ((NDID == 0x06)) { Name (TMP6, Package (0x06) { Ones, Ones, Ones, Ones, Ones, Ones }) TMP6 [Zero] = (0x00010000 | DID1) TMP6 [One] = (0x00010000 | DID2) TMP6 [0x02] = (0x00010000 | DID3) TMP6 [0x03] = (0x00010000 | DID4) TMP6 [0x04] = (0x00010000 | DID5) TMP6 [0x05] = (0x00010000 | DID6) Return (TMP6) /* \_SB_.PCI0.GFX0._DOD.TMP6 */ } If ((NDID == 0x07)) { Name (TMP7, Package (0x07) { Ones, Ones, Ones, Ones, Ones, Ones, Ones }) TMP7 [Zero] = (0x00010000 | DID1) TMP7 [One] = (0x00010000 | DID2) TMP7 [0x02] = (0x00010000 | DID3) TMP7 [0x03] = (0x00010000 | DID4) TMP7 [0x04] = (0x00010000 | DID5) TMP7 [0x05] = (0x00010000 | DID6) TMP7 [0x06] = (0x00010000 | DID7) Return (TMP7) /* \_SB_.PCI0.GFX0._DOD.TMP7 */ } If ((NDID == 0x08)) { Name (TMP8, Package (0x08) { Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones }) TMP8 [Zero] = (0x00010000 | DID1) TMP8 [One] = (0x00010000 | DID2) TMP8 [0x02] = (0x00010000 | DID3) TMP8 [0x03] = (0x00010000 | DID4) TMP8 [0x04] = (0x00010000 | DID5) TMP8 [0x05] = (0x00010000 | DID6) TMP8 [0x06] = (0x00010000 | DID7) TMP8 [0x07] = (0x00010000 | DID8) Return (TMP8) /* \_SB_.PCI0.GFX0._DOD.TMP8 */ } If ((NDID == 0x09)) { Name (TMP9, Package (0x09) { Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones }) TMP9 [Zero] = (0x00010000 | DID1) TMP9 [One] = (0x00010000 | DID2) TMP9 [0x02] = (0x00010000 | DID3) TMP9 [0x03] = (0x00010000 | DID4) TMP9 [0x04] = (0x00010000 | DID5) TMP9 [0x05] = (0x00010000 | DID6) TMP9 [0x06] = (0x00010000 | DID7) TMP9 [0x07] = (0x00010000 | DID8) TMP9 [0x08] = (0x00010000 | DID9) Return (TMP9) /* \_SB_.PCI0.GFX0._DOD.TMP9 */ } If ((NDID == 0x0A)) { Name (TMPA, Package (0x0A) { Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones }) TMPA [Zero] = (0x00010000 | DID1) TMPA [One] = (0x00010000 | DID2) TMPA [0x02] = (0x00010000 | DID3) TMPA [0x03] = (0x00010000 | DID4) TMPA [0x04] = (0x00010000 | DID5) TMPA [0x05] = (0x00010000 | DID6) TMPA [0x06] = (0x00010000 | DID7) TMPA [0x07] = (0x00010000 | DID8) TMPA [0x08] = (0x00010000 | DID9) TMPA [0x09] = (0x00010000 | DIDA) Return (TMPA) /* \_SB_.PCI0.GFX0._DOD.TMPA */ } If ((NDID == 0x0B)) { Name (TMPB, Package (0x0B) { Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones }) TMPB [Zero] = (0x00010000 | DID1) TMPB [One] = (0x00010000 | DID2) TMPB [0x02] = (0x00010000 | DID3) TMPB [0x03] = (0x00010000 | DID4) TMPB [0x04] = (0x00010000 | DID5) TMPB [0x05] = (0x00010000 | DID6) TMPB [0x06] = (0x00010000 | DID7) TMPB [0x07] = (0x00010000 | DID8) TMPB [0x08] = (0x00010000 | DID9) TMPB [0x09] = (0x00010000 | DIDA) TMPB [0x0A] = (0x00010000 | DIDB) Return (TMPB) /* \_SB_.PCI0.GFX0._DOD.TMPB */ } If ((NDID == 0x0C)) { Name (TMPC, Package (0x0C) { Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones }) TMPC [Zero] = (0x00010000 | DID1) TMPC [One] = (0x00010000 | DID2) TMPC [0x02] = (0x00010000 | DID3) TMPC [0x03] = (0x00010000 | DID4) TMPC [0x04] = (0x00010000 | DID5) TMPC [0x05] = (0x00010000 | DID6) TMPC [0x06] = (0x00010000 | DID7) TMPC [0x07] = (0x00010000 | DID8) TMPC [0x08] = (0x00010000 | DID9) TMPC [0x09] = (0x00010000 | DIDA) TMPC [0x0A] = (0x00010000 | DIDB) TMPC [0x0B] = (0x00010000 | DIDC) Return (TMPC) /* \_SB_.PCI0.GFX0._DOD.TMPC */ } If ((NDID == 0x0D)) { Name (TMPD, Package (0x0D) { Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones }) TMPD [Zero] = (0x00010000 | DID1) TMPD [One] = (0x00010000 | DID2) TMPD [0x02] = (0x00010000 | DID3) TMPD [0x03] = (0x00010000 | DID4) TMPD [0x04] = (0x00010000 | DID5) TMPD [0x05] = (0x00010000 | DID6) TMPD [0x06] = (0x00010000 | DID7) TMPD [0x07] = (0x00010000 | DID8) TMPD [0x08] = (0x00010000 | DID9) TMPD [0x09] = (0x00010000 | DIDA) TMPD [0x0A] = (0x00010000 | DIDB) TMPD [0x0B] = (0x00010000 | DIDC) TMPD [0x0C] = (0x00010000 | DIDD) Return (TMPD) /* \_SB_.PCI0.GFX0._DOD.TMPD */ } If ((NDID == 0x0E)) { Name (TMPE, Package (0x0E) { Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones }) TMPE [Zero] = (0x00010000 | DID1) TMPE [One] = (0x00010000 | DID2) TMPE [0x02] = (0x00010000 | DID3) TMPE [0x03] = (0x00010000 | DID4) TMPE [0x04] = (0x00010000 | DID5) TMPE [0x05] = (0x00010000 | DID6) TMPE [0x06] = (0x00010000 | DID7) TMPE [0x07] = (0x00010000 | DID8) TMPE [0x08] = (0x00010000 | DID9) TMPE [0x09] = (0x00010000 | DIDA) TMPE [0x0A] = (0x00010000 | DIDB) TMPE [0x0B] = (0x00010000 | DIDC) TMPE [0x0C] = (0x00010000 | DIDD) TMPE [0x0D] = (0x00010000 | DIDE) Return (TMPE) /* \_SB_.PCI0.GFX0._DOD.TMPE */ } If ((NDID == 0x0F)) { Name (TMPF, Package (0x0F) { Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones, Ones }) TMPF [Zero] = (0x00010000 | DID1) TMPF [One] = (0x00010000 | DID2) TMPF [0x02] = (0x00010000 | DID3) TMPF [0x03] = (0x00010000 | DID4) TMPF [0x04] = (0x00010000 | DID5) TMPF [0x05] = (0x00010000 | DID6) TMPF [0x06] = (0x00010000 | DID7) TMPF [0x07] = (0x00010000 | DID8) TMPF [0x08] = (0x00010000 | DID9) TMPF [0x09] = (0x00010000 | DIDA) TMPF [0x0A] = (0x00010000 | DIDB) TMPF [0x0B] = (0x00010000 | DIDC) TMPF [0x0C] = (0x00010000 | DIDD) TMPF [0x0D] = (0x00010000 | DIDE) TMPF [0x0E] = (0x00010000 | DIDF) Return (TMPF) /* \_SB_.PCI0.GFX0._DOD.TMPF */ } Return (Package (0x01) { 0x0400 }) } Device (DD01) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DID1) == 0x0400)) { EDPV = One NXDX = NXD1 /* \NXD1 */ DIDX = DID1 /* \DID1 */ Return (One) } If ((DID1 == Zero)) { Return (One) } Else { Return ((0xFFFF & DID1)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { Return (CDDS (DID1)) } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD1) /* \NXD1 */ } Return (NDDS (DID1)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD02) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DID2) == 0x0400)) { EDPV = 0x02 NXDX = NXD2 /* \NXD2 */ DIDX = DID2 /* \DID2 */ Return (0x02) } If ((DID2 == Zero)) { Return (0x02) } Else { Return ((0xFFFF & DID2)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((LIDS == Zero)) { Return (Zero) } Return (CDDS (DID2)) } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD2) /* \NXD2 */ } Return (NDDS (DID2)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD03) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DID3) == 0x0400)) { EDPV = 0x03 NXDX = NXD3 /* \NXD3 */ DIDX = DID3 /* \DID3 */ Return (0x03) } If ((DID3 == Zero)) { Return (0x03) } Else { Return ((0xFFFF & DID3)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DID3 == Zero)) { Return (0x0B) } Else { Return (CDDS (DID3)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD3) /* \NXD3 */ } Return (NDDS (DID3)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD04) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DID4) == 0x0400)) { EDPV = 0x04 NXDX = NXD4 /* \NXD4 */ DIDX = DID4 /* \DID4 */ Return (0x04) } If ((DID4 == Zero)) { Return (0x04) } Else { Return ((0xFFFF & DID4)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DID4 == Zero)) { Return (0x0B) } Else { Return (CDDS (DID4)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD4) /* \NXD4 */ } Return (NDDS (DID4)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD05) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DID5) == 0x0400)) { EDPV = 0x05 NXDX = NXD5 /* \NXD5 */ DIDX = DID5 /* \DID5 */ Return (0x05) } If ((DID5 == Zero)) { Return (0x05) } Else { Return ((0xFFFF & DID5)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DID5 == Zero)) { Return (0x0B) } Else { Return (CDDS (DID5)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD5) /* \NXD5 */ } Return (NDDS (DID5)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD06) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DID6) == 0x0400)) { EDPV = 0x06 NXDX = NXD6 /* \NXD6 */ DIDX = DID6 /* \DID6 */ Return (0x06) } If ((DID6 == Zero)) { Return (0x06) } Else { Return ((0xFFFF & DID6)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DID6 == Zero)) { Return (0x0B) } Else { Return (CDDS (DID6)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD6) /* \NXD6 */ } Return (NDDS (DID6)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD07) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DID7) == 0x0400)) { EDPV = 0x07 NXDX = NXD7 /* \NXD7 */ DIDX = DID7 /* \DID7 */ Return (0x07) } If ((DID7 == Zero)) { Return (0x07) } Else { Return ((0xFFFF & DID7)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DID7 == Zero)) { Return (0x0B) } Else { Return (CDDS (DID7)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD7) /* \NXD7 */ } Return (NDDS (DID7)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD08) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DID8) == 0x0400)) { EDPV = 0x08 NXDX = NXD8 /* \NXD8 */ DIDX = DID8 /* \DID8 */ Return (0x08) } If ((DID8 == Zero)) { Return (0x08) } Else { Return ((0xFFFF & DID8)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DID8 == Zero)) { Return (0x0B) } Else { Return (CDDS (DID8)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD8) /* \NXD8 */ } Return (NDDS (DID8)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD09) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DID9) == 0x0400)) { EDPV = 0x09 NXDX = NXD8 /* \NXD8 */ DIDX = DID9 /* \DID9 */ Return (0x09) } If ((DID9 == Zero)) { Return (0x09) } Else { Return ((0xFFFF & DID9)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DID9 == Zero)) { Return (0x0B) } Else { Return (CDDS (DID9)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD8) /* \NXD8 */ } Return (NDDS (DID9)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD0A) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DIDA) == 0x0400)) { EDPV = 0x0A NXDX = NXD8 /* \NXD8 */ DIDX = DIDA /* \DIDA */ Return (0x0A) } If ((DIDA == Zero)) { Return (0x0A) } Else { Return ((0xFFFF & DIDA)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DIDA == Zero)) { Return (0x0B) } Else { Return (CDDS (DIDA)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD8) /* \NXD8 */ } Return (NDDS (DIDA)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD0B) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DIDB) == 0x0400)) { EDPV = 0x0B NXDX = NXD8 /* \NXD8 */ DIDX = DIDB /* \DIDB */ Return (0x0B) } If ((DIDB == Zero)) { Return (0x0B) } Else { Return ((0xFFFF & DIDB)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DIDB == Zero)) { Return (0x0B) } Else { Return (CDDS (DIDB)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD8) /* \NXD8 */ } Return (NDDS (DIDB)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD0C) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DIDC) == 0x0400)) { EDPV = 0x0C NXDX = NXD8 /* \NXD8 */ DIDX = DIDC /* \DIDC */ Return (0x0C) } If ((DIDC == Zero)) { Return (0x0C) } Else { Return ((0xFFFF & DIDC)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DIDC == Zero)) { Return (0x0C) } Else { Return (CDDS (DIDC)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD8) /* \NXD8 */ } Return (NDDS (DIDC)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD0D) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DIDD) == 0x0400)) { EDPV = 0x0D NXDX = NXD8 /* \NXD8 */ DIDX = DIDD /* \DIDD */ Return (0x0D) } If ((DIDD == Zero)) { Return (0x0D) } Else { Return ((0xFFFF & DIDD)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DIDD == Zero)) { Return (0x0D) } Else { Return (CDDS (DIDD)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD8) /* \NXD8 */ } Return (NDDS (DIDD)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD0E) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DIDE) == 0x0400)) { EDPV = 0x0E NXDX = NXD8 /* \NXD8 */ DIDX = DIDE /* \DIDE */ Return (0x0E) } If ((DIDE == Zero)) { Return (0x0E) } Else { Return ((0xFFFF & DIDE)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DIDE == Zero)) { Return (0x0E) } Else { Return (CDDS (DIDE)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD8) /* \NXD8 */ } Return (NDDS (DIDE)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD0F) { Method (_ADR, 0, Serialized) // _ADR: Address { If (((0x0F00 & DIDF) == 0x0400)) { EDPV = 0x0F NXDX = NXD8 /* \NXD8 */ DIDX = DIDF /* \DIDF */ Return (0x0F) } If ((DIDF == Zero)) { Return (0x0F) } Else { Return ((0xFFFF & DIDF)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((DIDC == Zero)) { Return (0x0F) } Else { Return (CDDS (DIDF)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXD8) /* \NXD8 */ } Return (NDDS (DIDF)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } } Device (DD1F) { Method (_ADR, 0, Serialized) // _ADR: Address { If ((EDPV == Zero)) { Return (0x1F) } Else { Return ((0xFFFF & DIDX)) } } Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status { If ((EDPV == Zero)) { Return (Zero) } Else { Return (CDDS (DIDX)) } } Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State { If ((((SGMD & 0x7F) == One) && CondRefOf (SNXD))) { Return (NXDX) /* \NXDX */ } Return (NDDS (DIDX)) } Method (_DSS, 1, NotSerialized) // _DSS: Device Set State { If (((Arg0 & 0xC0000000) == 0xC0000000)) { CSTE = NSTE /* \NSTE */ } } Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels { Return (Package (0x67) { 0x50, 0x32, Zero, One, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60, 0x61, 0x62, 0x63, 0x64 }) } Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method { If (((Arg0 >= Zero) && (Arg0 <= 0x64))) { \_SB.PCI0.GFX0.AINT (One, Arg0) BRTL = Arg0 } } Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current { Return (BRTL) /* \BRTL */ } } Method (SDDL, 1, NotSerialized) { NDID++ Local0 = (Arg0 & 0x0F0F) Local1 = (0x80000000 | Local0) If ((DIDL == Local0)) { Return (Local1) } If ((DDL2 == Local0)) { Return (Local1) } If ((DDL3 == Local0)) { Return (Local1) } If ((DDL4 == Local0)) { Return (Local1) } If ((DDL5 == Local0)) { Return (Local1) } If ((DDL6 == Local0)) { Return (Local1) } If ((DDL7 == Local0)) { Return (Local1) } If ((DDL8 == Local0)) { Return (Local1) } If ((DDL9 == Local0)) { Return (Local1) } If ((DD10 == Local0)) { Return (Local1) } If ((DD11 == Local0)) { Return (Local1) } If ((DD12 == Local0)) { Return (Local1) } If ((DD13 == Local0)) { Return (Local1) } If ((DD14 == Local0)) { Return (Local1) } If ((DD15 == Local0)) { Return (Local1) } NDID-- Return (Zero) } Method (CDDS, 1, NotSerialized) { Local0 = (Arg0 & 0x0F0F) If ((Zero == Local0)) { Return (0x1D) } If ((CADL == Local0)) { Return (0x1F) } If ((CAL2 == Local0)) { Return (0x1F) } If ((CAL3 == Local0)) { Return (0x1F) } If ((CAL4 == Local0)) { Return (0x1F) } If ((CAL5 == Local0)) { Return (0x1F) } If ((CAL6 == Local0)) { Return (0x1F) } If ((CAL7 == Local0)) { Return (0x1F) } If ((CAL8 == Local0)) { Return (0x1F) } Return (0x1D) } Method (NDDS, 1, NotSerialized) { Local0 = (Arg0 & 0x0F0F) If ((Zero == Local0)) { Return (Zero) } If ((NADL == Local0)) { Return (One) } If ((NDL2 == Local0)) { Return (One) } If ((NDL3 == Local0)) { Return (One) } If ((NDL4 == Local0)) { Return (One) } If ((NDL5 == Local0)) { Return (One) } If ((NDL6 == Local0)) { Return (One) } If ((NDL7 == Local0)) { Return (One) } If ((NDL8 == Local0)) { Return (One) } Return (Zero) } Scope (\_SB.PCI0) { OperationRegion (MCHP, PCI_Config, 0x40, 0xC0) Field (MCHP, AnyAcc, NoLock, Preserve) { Offset (0x14), AUDE, 8, Offset (0x60), TASM, 10, Offset (0x62) } } OperationRegion (IGDP, PCI_Config, 0x40, 0xC0) Field (IGDP, AnyAcc, NoLock, Preserve) { Offset (0x12), , 1, GIVD, 1, , 2, GUMA, 3, Offset (0x14), , 4, GMFN, 1, Offset (0x18), Offset (0xA4), ASLE, 8, Offset (0xA8), GSSE, 1, GSSB, 14, GSES, 1, Offset (0xB0), , 12, CDVL, 1, Offset (0xB2), Offset (0xB5), LBPC, 8, Offset (0xBC), ASLS, 32 } OperationRegion (IGDM, SystemMemory, ASLB, 0x2000) Field (IGDM, AnyAcc, NoLock, Preserve) { SIGN, 128, SIZE, 32, OVER, 32, SVER, 256, VVER, 128, GVER, 128, MBOX, 32, DMOD, 32, PCON, 32, DVER, 64, Offset (0x100), DRDY, 32, CSTS, 32, CEVT, 32, Offset (0x120), DIDL, 32, DDL2, 32, DDL3, 32, DDL4, 32, DDL5, 32, DDL6, 32, DDL7, 32, DDL8, 32, CPDL, 32, CPL2, 32, CPL3, 32, CPL4, 32, CPL5, 32, CPL6, 32, CPL7, 32, CPL8, 32, CADL, 32, CAL2, 32, CAL3, 32, CAL4, 32, CAL5, 32, CAL6, 32, CAL7, 32, CAL8, 32, NADL, 32, NDL2, 32, NDL3, 32, NDL4, 32, NDL5, 32, NDL6, 32, NDL7, 32, NDL8, 32, ASLP, 32, TIDX, 32, CHPD, 32, CLID, 32, CDCK, 32, SXSW, 32, EVTS, 32, CNOT, 32, NRDY, 32, DDL9, 32, DD10, 32, DD11, 32, DD12, 32, DD13, 32, DD14, 32, DD15, 32, CPL9, 32, CP10, 32, CP11, 32, CP12, 32, CP13, 32, CP14, 32, CP15, 32, Offset (0x200), SCIE, 1, GEFC, 4, GXFC, 3, GESF, 8, Offset (0x204), PARM, 32, DSLP, 32, Offset (0x300), ARDY, 32, ASLC, 32, TCHE, 32, ALSI, 32, BCLP, 32, PFIT, 32, CBLV, 32, BCLM, 320, CPFM, 32, EPFM, 32, PLUT, 592, PFMB, 32, CCDV, 32, PCFT, 32, SROT, 32, IUER, 32, FDSP, 64, FDSS, 32, STAT, 32, Offset (0x400), GVD1, 49152, PHED, 32, BDDC, 2048 } Name (DBTB, Package (0x15) { Zero, 0x07, 0x38, 0x01C0, 0x0E00, 0x3F, 0x01C7, 0x0E07, 0x01F8, 0x0E38, 0x0FC0, Zero, Zero, Zero, Zero, Zero, 0x7000, 0x7007, 0x7038, 0x71C0, 0x7E00 }) Name (CDCT, Package (0x05) { Package (0x02) { 0xE4, 0x0140 }, Package (0x02) { 0xDE, 0x014D }, Package (0x02) { 0xDE, 0x014D }, Package (0x02) { Zero, Zero }, Package (0x02) { 0xDE, 0x014D } }) Name (SUCC, One) Name (NVLD, 0x02) Name (CRIT, 0x04) Name (NCRT, 0x06) Method (GSCI, 0, Serialized) { Method (GBDA, 0, Serialized) { If ((GESF == Zero)) { PARM = 0x0659 GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == One)) { PARM = 0x00300482 If ((S0ID == One)) { PARM |= 0x0100 } GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x04)) { PARM &= 0xEFFF0000 PARM &= (DerefOf (DBTB [IBTT]) << 0x10) PARM |= IBTT /* \_SB_.PCI0.GFX0.PARM */ GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x05)) { PARM = IPSC /* \IPSC */ PARM |= (IPAT << 0x08) PARM += 0x0100 PARM |= (LIDS << 0x10) PARM += 0x00010000 PARM |= (IBIA << 0x14) GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x07)) { PARM = GIVD /* \_SB_.PCI0.GFX0.GIVD */ PARM ^= One PARM |= (GMFN << One) PARM |= 0x1800 PARM |= (IDMS << 0x11) PARM |= (DerefOf (DerefOf (CDCT [HVCO]) [CDVL]) << 0x15) /* \_SB_.PCI0.GFX0.PARM */ GESF = One Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x0A)) { PARM = Zero If (ISSC) { PARM |= 0x03 } GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x0B)) { PARM = KSV0 /* \KSV0 */ GESF = KSV1 /* \KSV1 */ Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } GESF = Zero Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */ } Method (SBCB, 0, Serialized) { If ((GESF == Zero)) { PARM = Zero PARM = 0x000F87DD GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == One)) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x03)) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x04)) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x05)) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x07)) { If ((S0ID == One)) { If (((PARM & 0xFF) == One)) { \GUAM (One) } } If ((PARM == Zero)) { Local0 = CLID /* \_SB_.PCI0.GFX0.CLID */ If ((0x80000000 & Local0)) { CLID &= 0x0F GLID (CLID) } } GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x08)) { If ((S0ID == One)) { Local0 = ((PARM >> 0x08) & 0xFF) If ((Local0 == Zero)) { \GUAM (Zero) } } GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x09)) { IBTT = (PARM & 0xFF) GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x0A)) { IPSC = (PARM & 0xFF) If (((PARM >> 0x08) & 0xFF)) { IPAT = ((PARM >> 0x08) & 0xFF) IPAT-- } IBIA = ((PARM >> 0x14) & 0x07) GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x0B)) { IF1E = ((PARM >> One) & One) If ((PARM & 0x0001E000)) { IDMS = ((PARM >> 0x0D) & 0x0F) } Else { IDMS = ((PARM >> 0x11) & 0x0F) } GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x10)) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x11)) { PARM = (LIDS << 0x08) PARM += 0x0100 GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x12)) { If ((PARM & One)) { If (((PARM >> One) == One)) { ISSC = One } Else { GESF = Zero Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */ } } Else { ISSC = Zero } GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x13)) { GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x14)) { PAVP = (PARM & 0x0F) GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GESF == 0x15)) { If ((PARM == One)) { \_SB.PCI0.AUDE |= 0x20 \_SB.PCI0.B0D3.ABWA (One) \_SB.PCI0.B0D3.ARST () \_SB.PCI0.B0D3.ASTR () \_SB.PCI0.B0D3.AINI () \_SB.PCI0.B0D3.CXDC () \_SB.PCI0.B0D3.ABWA (Zero) Notify (\_SB.PCI0, Zero) // Bus Check } If ((PARM == Zero)) { \_SB.PCI0.AUDE &= 0xDF Notify (\_SB.PCI0, Zero) // Bus Check } GESF = Zero PARM = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } GESF = Zero Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */ } If ((GEFC == 0x04)) { GXFC = GBDA () } If ((GEFC == 0x06)) { GXFC = SBCB () } GEFC = Zero SCIS = One GSSE = Zero SCIE = Zero Return (Zero) } Method (PDRD, 0, NotSerialized) { Return (!DRDY) } Method (PSTS, 0, NotSerialized) { If ((CSTS > 0x02)) { Sleep (ASLP) } Return ((CSTS == 0x03)) } Method (GNOT, 2, NotSerialized) { If (PDRD ()) { Return (One) } CEVT = Arg0 CSTS = 0x03 If (((CHPD == Zero) && (Arg1 == Zero))) { If (((OSYS > 0x07D0) || (OSYS < 0x07D6))) { Notify (\_SB.PCI0, Arg1) } Else { Notify (\_SB.PCI0.GFX0, Arg1) } } If (CondRefOf (HNOT)) { HNOT (Arg0) } Else { Notify (\_SB.PCI0.GFX0, 0x80) // Status Change } Return (Zero) } Method (GHDS, 1, NotSerialized) { TIDX = Arg0 Return (GNOT (One, Zero)) } Method (GLID, 1, NotSerialized) { If ((Arg0 == One)) { CLID = 0x03 } Else { CLID = Arg0 } If (GNOT (0x02, Zero)) { CLID |= 0x80000000 Return (One) } Return (Zero) } Method (GDCK, 1, NotSerialized) { CDCK = Arg0 Return (GNOT (0x04, Zero)) } Method (PARD, 0, NotSerialized) { If (!ARDY) { Sleep (ASLP) } Return (!ARDY) } Method (IUEH, 1, Serialized) { IUER &= 0xC0 IUER ^= (One << Arg0) If ((Arg0 <= 0x04)) { Return (AINT (0x05, Zero)) } Else { Return (AINT (Arg0, Zero)) } } Method (AINT, 2, NotSerialized) { If (!(TCHE & (One << Arg0))) { Return (One) } If (PARD ()) { Return (One) } If (((Arg0 >= 0x05) && (Arg0 <= 0x07))) { ASLC = (One << Arg0) ASLE = One Local2 = Zero While (((Local2 < 0xFA) && (ASLC != Zero))) { Sleep (0x04) Local2++ } Return (Zero) } If ((Arg0 == 0x02)) { If (CPFM) { Local0 = (CPFM & 0x0F) Local1 = (EPFM & 0x0F) If ((Local0 == One)) { If ((Local1 & 0x06)) { PFIT = 0x06 } ElseIf ((Local1 & 0x08)) { PFIT = 0x08 } Else { PFIT = One } } If ((Local0 == 0x06)) { If ((Local1 & 0x08)) { PFIT = 0x08 } ElseIf ((Local1 & One)) { PFIT = One } Else { PFIT = 0x06 } } If ((Local0 == 0x08)) { If ((Local1 & One)) { PFIT = One } ElseIf ((Local1 & 0x06)) { PFIT = 0x06 } Else { PFIT = 0x08 } } } Else { PFIT ^= 0x07 } PFIT |= 0x80000000 ASLC = 0x04 } ElseIf ((Arg0 == One)) { BCLP = ((Arg1 * 0xFF) / 0x64) BCLP |= 0x80000000 ASLC = 0x02 } ElseIf ((Arg0 == Zero)) { ALSI = Arg1 ASLC = One } Else { Return (One) } ASLE = One Return (Zero) } Method (SCIP, 0, NotSerialized) { If ((OVER != Zero)) { Return (!GSMI) } Return (Zero) } Device (\_SB.MEM2) { Name (_HID, EisaId ("PNP0C01") /* System Board */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (CRS2, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x20000000, // Address Base 0x00200000, // Address Length ) Memory32Fixed (ReadWrite, 0x40004000, // Address Base 0x00001000, // Address Length ) }) Method (_STA, 0, NotSerialized) // _STA: Status { If (IGDS) { If ((PNHM == 0x000306C1)) { Return (0x0F) } } Return (Zero) } Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Return (CRS2) /* \_SB_.MEM2.CRS2 */ } } } } }