=> Bootstrap dependency digest>=20010302: found digest-20111104
===> Installing for verilog-current-20090923
=> Generating pre-install file lists
for dir in ivlpp vvp vpi libveriuser cadpli tgt-null tgt-stub tgt-vvp tgt-vhdl driver; do (cd $dir ; /usr/bin/gnumake all); done
gnumake[1]: Nothing to be done for `all'.
gnumake[1]: Nothing to be done for `all'.
gnumake[1]: Nothing to be done for `all'.
gnumake[1]: Nothing to be done for `all'.
gnumake[1]: Nothing to be done for `all'.
gnumake[1]: Nothing to be done for `all'.
gnumake[1]: Nothing to be done for `all'.
gnumake[1]: Nothing to be done for `all'.
gnumake[1]: Nothing to be done for `all'.
gnumake[1]: Nothing to be done for `all'.
./mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/bin" \
	    "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/include/iverilog" \
	    "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl" \
	    "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/include" \
	    "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/man" \
	    "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/man/man1"
mkdir /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/bin
mkdir /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/include
mkdir /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/include/iverilog
mkdir /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib
mkdir /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl
mkdir /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/include
mkdir /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/man
mkdir /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/man/man1
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./ivl "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/ivl"
/usr/bin/install -c -o kristerw -g staff -m 644 ./constants.vams "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/include/constants.vams"
/usr/bin/install -c -o kristerw -g staff -m 644 ./disciplines.vams "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/include/disciplines.vams"
/usr/bin/install -c -o kristerw -g staff -m 644 ./ivl_target.h "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/include/iverilog/ivl_target.h"
/usr/bin/install -c -o kristerw -g staff -m 644 _pli_types.h "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/include/iverilog/_pli_types.h"
/usr/bin/install -c -o kristerw -g staff -m 644 ./vpi_user.h "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/include/iverilog/vpi_user.h"
/usr/bin/install -c -o kristerw -g staff -m 644 ./acc_user.h "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/include/iverilog/acc_user.h"
/usr/bin/install -c -o kristerw -g staff -m 644 ./veriuser.h "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/include/iverilog/veriuser.h"
/usr/bin/install -c -o kristerw -g staff -m 755 ./iverilog-vpi "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/bin/iverilog-vpi"
/usr/bin/install -c -o kristerw -g staff -m 644 ./iverilog-vpi.man "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/man/man1/iverilog-vpi.1"
for dir in ivlpp vvp vpi libveriuser cadpli tgt-null tgt-stub tgt-vvp tgt-vhdl driver; do (cd $dir ; /usr/bin/gnumake install); done
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl"
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./ivlpp "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/ivlpp"
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/bin" "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib" "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/man/man1"
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./vvp "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/bin/vvp"
/usr/bin/install -c -o kristerw -g staff -m 644 libvpi.a "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/libvpi.a"
/usr/bin/install -c -o kristerw -g staff -m 644 ./vvp.man "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/man/man1/vvp.1"
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib" "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl"
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./system.vpi "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/system.vpi"
/Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/strip: symbols referenced by indirect symbol table entries that can't be stripped in: /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/system.vpi
_vpi_control
_vpi_fopen
_vpi_free_object
_vpi_get
_vpi_get_delays
_vpi_get_file
_vpi_get_str
_vpi_get_time
_vpi_get_userdata
_vpi_get_value
_vpi_get_vlog_info
_vpi_handle
_vpi_handle_by_index
_vpi_handle_by_name
_vpi_iterate
_vpi_mcd_close
_vpi_mcd_flush
_vpi_mcd_open
_vpi_mcd_printf
_vpi_mcd_vprintf
_vpi_printf
_vpi_put_delays
_vpi_put_userdata
_vpi_put_value
_vpi_register_cb
_vpi_register_systf
_vpi_remove_cb
_vpi_scan
_vpip_format_strength
_vpip_set_return_value
_rtl_dist_chi_square
_rtl_dist_normal
_rtl_dist_t
_rtl_dist_uniform
_destroy_readmem_lexor
_readmem_create_buffer
_readmem_scan_buffer
_readmem_scan_bytes
_readmem_switch_to_buffer
_readmemlex
_readmemlex_destroy
_readmempop_buffer_state
_readmemrestart
_sys_readmem_start_file
_sdf_iopath_delays
_sdf_select_instance
_sys_vcd_register
_sys_vcdoff_register
_find_nexus_ident
_is_escaped_id
_nexus_ident_delete
_set_nexus_ident
_vcd_names_add
_vcd_names_delete
_vcd_names_search
_vcd_names_sort
_genrand
_sgenrand
_as_escaped
_check_for_extra_args
_get_filename
_is_numeric_obj
_is_string_obj
_sys_func_module
_timerec_to_time64
_sdf_create_buffer
_sdf_flush_buffer
_sdf_process_file
_sdf_scan_buffer
_sdf_scan_bytes
_sdf_switch_to_buffer
_sdflex
_sdflex_destroy
_sdfpop_buffer_state
_sdfrestart
_start_edge_id
_stop_edge_id
_sdfparse
_strdup_sh
_string_heap_delete
_sys_lxt_register
_lt_close
_lt_emit_value_bit_string
_lt_emit_value_double
_lt_init
_lt_set_clock_compress
_lt_set_dumpoff
_lt_set_dumpon
_lt_set_initial_value
_lt_set_no_interlace
_lt_set_time64
_lt_set_timescale
_lt_symbol_add
_lt_symbol_alias
_sys_lxt2_register
_lxt2_wr_close
_lxt2_wr_emit_value_bit_string
_lxt2_wr_emit_value_double
_lxt2_wr_emit_value_string
_lxt2_wr_flush
_lxt2_wr_flush_granule
_lxt2_wr_init
_lxt2_wr_set_break_size
_lxt2_wr_set_compression_depth
_lxt2_wr_set_dumpoff
_lxt2_wr_set_dumpon
_lxt2_wr_set_initial_value
_lxt2_wr_set_partial_off
_lxt2_wr_set_partial_on
_lxt2_wr_set_time
_lxt2_wr_set_time64
_lxt2_wr_set_timescale
_lxt2_wr_symbol_add
_lxt2_wr_symbol_alias
_BZ2_bzclose
_BZ2_bzdopen
_BZ2_bzwrite
_gzclose
_gzdopen
_gzflush
_gzwrite
___assert_rtn
___divdi3
___error
___maskrune
___moddi3
___sprintf_chk
___stack_chk_fail
___strcat_chk
___strncat_chk
___strncpy_chk
___tolower
_asctime
_atexit
_bsearch
_calloc
_clearerr
_dup
_exit
_exp
_fclose
_feof
_ferror
_fflush
_fgetc
_fgets
_fileno
_fopen$UNIX2003
_fprintf
_fputc
_fread
_free
_fseek
_fseeko
_ftell
_ftello
_fwrite$UNIX2003
_getc
_getcwd
_getenv
_isatty
_localtime
_log
_malloc
_memchr
_memcmp
_memcpy
_memset
_pow
_qsort
_realloc
_round
_snprintf
_sscanf
_stat$INODE64
_strcasecmp
_strchr
_strcmp
_strcpy
_strcspn
_strdup
_strerror$UNIX2003
_strlen
_strncmp
_strncpy
_strrchr
_strspn
_strtod$UNIX2003
_strtok
_strtoul
_time
_ungetc
_unlink
_vfprintf
dyld_stub_binder
__DefaultRuneLocale
___stack_chk_guard
___stderrp
___stdinp
___stdoutp
install: child process failed: xcrun strip - /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/system.vpi
gnumake[1]: *** [/usr/pkg/lib/ivl/system.vpi] Error 70
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib"
/usr/bin/install -c -o kristerw -g staff -m 644 ./libveriuser.a "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/libveriuser.a"
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl"
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./cadpli.vpl "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/cadpli.vpl"
/Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/strip: symbols referenced by indirect symbol table entries that can't be stripped in: /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/cadpli.vpl
_vpi_control
_vpi_free_object
_vpi_get
_vpi_get_str
_vpi_get_time
_vpi_get_userdata
_vpi_get_value
_vpi_get_vlog_info
_vpi_handle
_vpi_handle_by_name
_vpi_iterate
_vpi_printf
_vpi_put_userdata
_vpi_put_value
_vpi_register_cb
_vpi_register_systf
_vpi_scan
_vpi_vprintf
_vpip_format_strength
___acc_newstring
_acc_fetch_fullname
_acc_fetch_itfarg_int
_acc_fetch_itfarg_str
_acc_fetch_tfarg_str
_acc_next
_acc_object_in_typelist
_acc_object_of_type
_tf_getinstance
_tf_gettimeprecision
_tf_gettimeunit
_tf_igetp
_tf_igetrealp
_tf_iputp
_tf_iputrealp
_tf_isetdelay
_tf_isetrealdelay
_tf_istrgetp
_veriusertfs_register_table
___assert_rtn
___fixunsdfdi
___sprintf_chk
___stack_chk_fail
___tolower
_calloc
_dlerror
_dlopen
_dlsym
_exit
_fflush
_fopen$UNIX2003
_fprintf
_fputc
_free
_fwrite$UNIX2003
_getenv
_malloc
_perror
_pow
_realloc
_setvbuf
_snprintf
_strchr
_strcmp
_strcpy
_strlen
_strncmp
_strncpy
_strtoul
dyld_stub_binder
___stderrp
___stack_chk_guard
___stdoutp
install: child process failed: xcrun strip - /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/cadpli.vpl
gnumake[1]: *** [/usr/pkg/lib/ivl/cadpli.vpl] Error 70
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/bin" "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl"
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./null.tgt "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/null.tgt"
/Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/strip: symbols referenced by indirect symbol table entries that can't be stripped in: /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/null.tgt
_strcmp
dyld_stub_binder
install: child process failed: xcrun strip - /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/null.tgt
gnumake[1]: *** [/usr/pkg/lib/ivl/null.tgt] Error 70
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl"
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./stub.tgt "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/stub.tgt"
/Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/strip: symbols referenced by indirect symbol table entries that can't be stripped in: /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/stub.tgt
_ivl_branch_terminal
_ivl_const_bits
_ivl_const_real
_ivl_const_type
_ivl_const_width
_ivl_design_discipline
_ivl_design_disciplines
_ivl_design_flag
_ivl_design_process
_ivl_design_roots
_ivl_discipline_name
_ivl_event_any
_ivl_event_basename
_ivl_event_nany
_ivl_event_neg
_ivl_event_nneg
_ivl_event_npos
_ivl_event_pos
_ivl_event_scope
_ivl_expr_bits
_ivl_expr_branch
_ivl_expr_def
_ivl_expr_dvalue
_ivl_expr_file
_ivl_expr_lineno
_ivl_expr_name
_ivl_expr_nature
_ivl_expr_opcode
_ivl_expr_oper1
_ivl_expr_oper2
_ivl_expr_oper3
_ivl_expr_parameter
_ivl_expr_parm
_ivl_expr_parms
_ivl_expr_repeat
_ivl_expr_signal
_ivl_expr_signed
_ivl_expr_string
_ivl_expr_type
_ivl_expr_value
_ivl_expr_width
_ivl_logic_attr_cnt
_ivl_logic_attr_val
_ivl_logic_basename
_ivl_logic_delay
_ivl_logic_drive0
_ivl_logic_drive1
_ivl_logic_pin
_ivl_logic_pins
_ivl_logic_scope
_ivl_logic_type
_ivl_logic_udp
_ivl_logic_width
_ivl_lpm_array
_ivl_lpm_base
_ivl_lpm_basename
_ivl_lpm_clk
_ivl_lpm_data
_ivl_lpm_define
_ivl_lpm_delay
_ivl_lpm_enable
_ivl_lpm_name
_ivl_lpm_q
_ivl_lpm_scope
_ivl_lpm_select
_ivl_lpm_selects
_ivl_lpm_signed
_ivl_lpm_size
_ivl_lpm_string
_ivl_lpm_type
_ivl_lpm_width
_ivl_lval_idx
_ivl_lval_mux
_ivl_lval_part_off
_ivl_lval_sig
_ivl_lval_width
_ivl_nature_name
_ivl_nexus_ptr
_ivl_nexus_ptr_branch
_ivl_nexus_ptr_con
_ivl_nexus_ptr_drive0
_ivl_nexus_ptr_drive1
_ivl_nexus_ptr_log
_ivl_nexus_ptr_lpm
_ivl_nexus_ptr_pin
_ivl_nexus_ptr_sig
_ivl_nexus_ptr_switch
_ivl_nexus_ptrs
_ivl_parameter_basename
_ivl_parameter_expr
_ivl_path_condit
_ivl_path_delay
_ivl_path_is_condit
_ivl_path_scope
_ivl_path_source
_ivl_path_source_negedge
_ivl_path_source_posedge
_ivl_process_analog
_ivl_process_attr_cnt
_ivl_process_attr_val
_ivl_process_stmt
_ivl_process_type
_ivl_scope_attr_cnt
_ivl_scope_attr_val
_ivl_scope_children
_ivl_scope_def
_ivl_scope_event
_ivl_scope_events
_ivl_scope_is_auto
_ivl_scope_is_cell
_ivl_scope_log
_ivl_scope_logs
_ivl_scope_lpm
_ivl_scope_lpms
_ivl_scope_name
_ivl_scope_param
_ivl_scope_params
_ivl_scope_sig
_ivl_scope_sigs
_ivl_scope_switch
_ivl_scope_switches
_ivl_scope_time_precision
_ivl_scope_time_units
_ivl_scope_tname
_ivl_scope_type
_ivl_signal_array_base
_ivl_signal_array_count
_ivl_signal_attr_cnt
_ivl_signal_attr_val
_ivl_signal_basename
_ivl_signal_data_type
_ivl_signal_dimensions
_ivl_signal_discipline
_ivl_signal_local
_ivl_signal_lsb
_ivl_signal_msb
_ivl_signal_name
_ivl_signal_nex
_ivl_signal_npath
_ivl_signal_path
_ivl_signal_port
_ivl_signal_signed
_ivl_signal_type
_ivl_signal_width
_ivl_statement_type
_ivl_stmt_block_count
_ivl_stmt_block_scope
_ivl_stmt_block_stmt
_ivl_stmt_case_count
_ivl_stmt_case_expr
_ivl_stmt_case_stmt
_ivl_stmt_cond_expr
_ivl_stmt_cond_false
_ivl_stmt_cond_true
_ivl_stmt_delay_expr
_ivl_stmt_delay_val
_ivl_stmt_events
_ivl_stmt_file
_ivl_stmt_lexp
_ivl_stmt_lineno
_ivl_stmt_lval
_ivl_stmt_lvals
_ivl_stmt_lwidth
_ivl_stmt_name
_ivl_stmt_nevent
_ivl_stmt_parm
_ivl_stmt_parm_count
_ivl_stmt_rval
_ivl_stmt_sub_stmt
_ivl_switch_a
_ivl_switch_b
_ivl_switch_basename
_ivl_switch_enable
_ivl_switch_island
_ivl_switch_offset
_ivl_switch_part
_ivl_switch_scope
_ivl_switch_type
_ivl_switch_width
_ivl_udp_init
_ivl_udp_name
_ivl_udp_nin
_ivl_udp_row
_ivl_udp_rows
_ivl_udp_sequ
_data_type_string
_discipline_of_nexus
_type_of_nexus
_width_of_nexus
_show_expression
_show_unary_expression
_show_statement
_show_stmt_wait
_show_switch
___assert_rtn
___stack_chk_fail
_calloc
_fclose
_fopen$UNIX2003
_fprintf
_fputc
_free
_fwrite$UNIX2003
_perror
_snprintf
_strcmp
dyld_stub_binder
___stack_chk_guard
install: child process failed: xcrun strip - /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/stub.tgt
gnumake[1]: *** [/usr/pkg/lib/ivl/stub.tgt] Error 70
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl"
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./vvp.tgt "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vvp.tgt"
/Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/strip: symbols referenced by indirect symbol table entries that can't be stripped in: /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vvp.tgt
_ivl_const_bits
_ivl_const_delay
_ivl_const_real
_ivl_const_type
_ivl_const_width
_ivl_design_flag
_ivl_design_process
_ivl_design_roots
_ivl_design_time_precision
_ivl_event_any
_ivl_event_basename
_ivl_event_nany
_ivl_event_neg
_ivl_event_nneg
_ivl_event_npos
_ivl_event_pos
_ivl_expr_bits
_ivl_expr_def
_ivl_expr_delay_val
_ivl_expr_dvalue
_ivl_expr_event
_ivl_expr_file
_ivl_expr_lineno
_ivl_expr_name
_ivl_expr_opcode
_ivl_expr_oper1
_ivl_expr_oper2
_ivl_expr_oper3
_ivl_expr_parameter
_ivl_expr_parm
_ivl_expr_parms
_ivl_expr_repeat
_ivl_expr_scope
_ivl_expr_signal
_ivl_expr_signed
_ivl_expr_string
_ivl_expr_type
_ivl_expr_uvalue
_ivl_expr_value
_ivl_expr_width
_ivl_file_table_index
_ivl_file_table_item
_ivl_file_table_size
_ivl_island_flag_set
_ivl_island_flag_test
_ivl_logic_delay
_ivl_logic_pin
_ivl_logic_pins
_ivl_logic_type
_ivl_logic_udp
_ivl_logic_width
_ivl_lpm_array
_ivl_lpm_aset_value
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install: child process failed: xcrun strip - /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vvp.tgt
gnumake[1]: *** [/usr/pkg/lib/ivl/vvp.tgt] Error 70
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl"
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./vhdl.tgt "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vhdl.tgt"
/Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/strip: symbols referenced by indirect symbol table entries that can't be stripped in: /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vhdl.tgt
_ivl_const_bits
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__ZNSt8_Rb_treeIP12ivl_signal_sSt4pairIKS1_13signal_defn_tESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE15_M_destroy_nodeEPSt13_Rb_tree_nodeIS5_E
__ZNSt8_Rb_treeIP12ivl_signal_sSt4pairIKS1_13signal_defn_tESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE16_M_insert_uniqueERKS5_
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__ZNSt8_Rb_treeIP12ivl_signal_sSt4pairIKS1_13signal_defn_tESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE7_S_leftEPSt18_Rb_tree_node_base
__ZNSt8_Rb_treeIP12ivl_signal_sSt4pairIKS1_13signal_defn_tESt10_Select1stIS5_ESt4lessIS1_ESaIS5_EE8_M_eraseEPSt13_Rb_tree_nodeIS5_E
__ZNSt8_Rb_treeISsSt4pairIKSsSsESt10_Select1stIS2_ESt4lessISsESaIS2_EE14_M_create_nodeERKS2_
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__ZNSt8_Rb_treeISsSt4pairIKSsSsESt10_Select1stIS2_ESt4lessISsESaIS2_EE16_M_insert_uniqueESt17_Rb_tree_iteratorIS2_ERKS2_
__ZNSt8_Rb_treeISsSt4pairIKSsSsESt10_Select1stIS2_ESt4lessISsESaIS2_EE7_S_leftEPSt18_Rb_tree_node_base
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__ZNSt8_Rb_treeISsSt4pairIKSsSsESt10_Select1stIS2_ESt4lessISsESaIS2_EED1Ev
__Z10blank_lineRSoi
__Z6indenti
__Z7newlineRSoi
__Z9nl_stringi
__ZN12vhdl_element11set_commentESs
__ZN12vhdl_element15total_allocatedEv
__ZN12vhdl_element16free_all_objectsEv
__ZN12vhdl_elementdlEPv
__ZN12vhdl_elementnwEm
__ZNK12vhdl_element12emit_commentERSoib
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__ZSt6__findIN9__gnu_cxx17__normal_iteratorIPP12vhdl_elementSt6vectorIS3_SaIS3_EEEES3_ET_S9_S9_RKT0_St26random_access_iterator_tag
__ZN9vhdl_type16std_logic_vectorEii
__ZN9vhdl_type4lineEv
__ZN9vhdl_type4timeEv
__ZN9vhdl_type6stringEv
__ZN9vhdl_type7booleanEv
__ZN9vhdl_type7integerEv
__ZN9vhdl_type7nsignedEii
__ZN9vhdl_type8array_ofEPS_RSsii
__ZN9vhdl_type8type_forEibi
__ZN9vhdl_type9nunsignedEii
__ZN9vhdl_type9std_logicEv
__ZN9vhdl_typeC1ERKS_
__ZN9vhdl_typeC2ERKS_
__ZN9vhdl_typeD1Ev
__ZNK9vhdl_type10get_stringEv
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__ZNK9vhdl_type20get_type_decl_stringEv
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__ZN13vhdl_functionD1Ev
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__ZN14vhdl_comp_instC2EPKcS1_
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__ZNK10vhdl_scope10get_parentEv
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__Z16nexus_to_var_refP10vhdl_scopeP11ivl_nexus_s
__ZN13scope_nexus_tC1ERKS_
__ZN14vhdl_port_declC2EPKcP9vhdl_type16vhdl_port_mode_t
__ZN14vhdl_type_declC1ERKSsPK9vhdl_type
__ZN15vhdl_param_declC2EPKcP9vhdl_type
__ZN16vhdl_signal_declC1ERKSsPK9vhdl_type
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__ZN9vhdl_archC2ERKSsS1_
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__ZNSt4listIP12ivl_signal_sSaIS1_EEC2ERKS3_
__ZStplIcSt11char_traitsIcESaIcEESbIT_T0_T1_EPKS3_RKS6_
__ZN12vhdl_processC2EPKc
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__Z11draw_repeatP15vhdl_proceduralP14stmt_containerP15ivl_statement_s
__Z12draw_foreverP15vhdl_proceduralP14stmt_containerP15ivl_statement_s
__Z15make_assignmentP15vhdl_proceduralP14stmt_containerP15ivl_statement_sbRN9vhdl_decl13assign_type_tE
__Z16prune_wait_for_0P14stmt_container
__Z9draw_stmtP15vhdl_proceduralP14stmt_containerP15ivl_statement_sb
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__ZN15vhdl_pcall_stmtC2EPKc
__ZN16vhdl_assert_stmtC2EPKc
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__ZNSt8_Rb_treeIP11ivl_nexus_sS1_St9_IdentityIS1_ESt4lessIS1_ESaIS1_EE16_M_insert_uniqueERKS1_
__ZNSt8_Rb_treeIP11ivl_nexus_sS1_St9_IdentityIS1_ESt4lessIS1_ESaIS1_EE16_M_insert_uniqueESt23_Rb_tree_const_iteratorIS1_ERKS1_
__ZNSt8_Rb_treeIP11ivl_nexus_sS1_St9_IdentityIS1_ESt4lessIS1_ESaIS1_EE7_S_leftEPSt18_Rb_tree_node_base
__ZNSt8_Rb_treeIP11ivl_nexus_sS1_St9_IdentityIS1_ESt4lessIS1_ESaIS1_EE8_M_eraseEPSt13_Rb_tree_nodeIS1_E
__ZSt14set_differenceISt23_Rb_tree_const_iteratorIP11ivl_nexus_sES3_St15insert_iteratorISt3setIS2_St4lessIS2_ESaIS2_EEEET1_T_SC_T0_SD_SB_
__Z14translate_exprP10ivl_expr_s
__Z15translate_sfuncP10ivl_expr_s
__Z19translate_time_exprP10ivl_expr_s
__Z20translate_sfunc_timeP10ivl_expr_s
__Z21translate_sfunc_stimeP10ivl_expr_s
__Z22translate_sfunc_randomP10ivl_expr_s
__Z23translate_sfunc_simtimeP10ivl_expr_s
__ZN17vhdl_const_stringC2EPKc
__Z8draw_lpmP9vhdl_archP9ivl_lpm_s
__Z18draw_stask_displayP15vhdl_proceduralP14stmt_containerP15ivl_statement_sb
__Z24require_support_function18support_function_t
__ZN13vhdl_functionD2Ev
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install: child process failed: xcrun strip - /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vhdl.tgt
gnumake[1]: *** [/usr/pkg/lib/ivl/vhdl.tgt] Error 70
./../mkinstalldirs "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/bin" "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/man/man1"
/usr/bin/install -c -s -o kristerw -g staff -m 755 ./iverilog "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/bin/iverilog"
/usr/bin/install -c -o kristerw -g staff -m 644 ./iverilog.man "/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/man/man1/iverilog.1"
=> Automatic manual page handling
=> Generating post-install file lists
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/cadpli.vpl'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/null-s.conf'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/null.conf'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/null.tgt'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/stub-s.conf'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/stub.conf'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/stub.tgt'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/system.sft'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/system.vpi'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/v2005_math.sft'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/v2005_math.vpi'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/va_math.sft'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/va_math.vpi'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vhdl-s.conf'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vhdl.conf'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vhdl.tgt'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vvp-s.conf'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vvp.conf'
pkg_create: can't stat `/Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vvp.tgt'
=> Checking file-check results for verilog-current-20090923
ERROR: ************************************************************
ERROR: The following files are in the PLIST but not in /usr/pkg:
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/cadpli.vpl
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/null-s.conf
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/null.conf
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/null.tgt
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/stub-s.conf
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/stub.conf
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/stub.tgt
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/system.sft
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/system.vpi
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/v2005_math.sft
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/v2005_math.vpi
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/va_math.sft
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/va_math.vpi
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vhdl-s.conf
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vhdl.conf
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vhdl.tgt
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vvp-s.conf
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vvp.conf
ERROR:         /Users/kristerw/pbulk/scratch/cad/verilog-current/work/.destdir/usr/pkg/lib/ivl/vvp.tgt
*** Error code 1

Stop.
bmake: stopped in /Users/kristerw/pbulk/pkgsrc/cad/verilog-current
*** Error code 1

Stop.
bmake: stopped in /Users/kristerw/pbulk/pkgsrc/cad/verilog-current