=> Bootstrap dependency digest>=20010302: found digest-20180917 ===> Skipping vulnerability checks. WARNING: No /var/db/pkg/pkg-vulnerabilities file found. WARNING: To fix run: `/usr/sbin/pkg_admin -K /var/db/pkg fetch-pkg-vulnerabilities'. ===> Installing for py37-MyHDL-0.10 => Generating pre-install file lists (cd /data/scratch/cad/py-MyHDL/work/myhdl-0.10/ && /usr/bin/env DESTDIR=/data/scratch/cad/py-MyHDL/work/.destdir USETOOLS=no PTHREAD_CFLAGS=\ -pthread\ PTHREAD_LDFLAGS=\ -pthread PTHREAD_LIBS= PTHREADBASE=/usr DL_CFLAGS=\ -pthread\ DL_LDFLAGS=\ -pthread DL_LIBS= PYTHON=/usr/pkg/bin/python3.7 CC=clang CFLAGS=-O2\ -I/usr/include\ -I/usr/pkg/include/python3.7 CPPFLAGS=-I/usr/include\ -I/usr/pkg/include/python3.7 CXX=clang++ CXXFLAGS=-O2\ -I/usr/include\ -I/usr/pkg/include/python3.7 COMPILER_RPATH_FLAG=-Wl,-R F77=gfortran FC=gfortran FFLAGS=-O LANG=C LC_ALL=C LC_COLLATE=C LC_CTYPE=C LC_MESSAGES=C LC_MONETARY=C LC_NUMERIC=C LC_TIME=C LDFLAGS=-L/usr/lib\ -Wl,-R/usr/lib\ -Wl,-R/usr/pkg/lib LINKER_RPATH_FLAG=-R PATH=/data/scratch/cad/py-MyHDL/work/.cwrapper/bin:/data/scratch/cad/py-MyHDL/work/.buildlink/bin:/data/scratch/cad/py-MyHDL/work/.tools/bin:/usr/pkg/bin:/usr/bin:/bin:/usr/pkg/bin:/usr/local/bin:/usr/pkg/bin:/usr/pkg/bin PREFIX=/usr/pkg MAKELEVEL=0 CONFIG_SITE= PKG_SYSCONFDIR=/usr/pkg/etc CXXCPP=clang-cpp HOME=/data/scratch/cad/py-MyHDL/work/.home CWRAPPERS_CONFIG_DIR=/data/scratch/cad/py-MyHDL/work/.cwrapper/config CPP=clang-cpp LOCALBASE=/usr/pkg X11BASE=/usr/pkg PKGMANDIR=man PKGINFODIR=info PKGGNUDIR=gnu/ MAKECONF=/dev/null OBJECT_FMT=ELF USETOOLS=no BSD_INSTALL_PROGRAM=/usr/bin/install\ -c\ -s\ -o\ pbulkXXX\ -g\ users\ -m\ 755 BSD_INSTALL_SCRIPT=/usr/bin/install\ -c\ -o\ pbulkXXX\ -g\ users\ -m\ 755 BSD_INSTALL_LIB=/usr/bin/install\ -c\ -o\ pbulkXXX\ -g\ users\ -m\ 755 BSD_INSTALL_DATA=/usr/bin/install\ -c\ -o\ pbulkXXX\ -g\ users\ -m\ 644 BSD_INSTALL_MAN=/usr/bin/install\ -c\ -o\ pbulkXXX\ -g\ users\ -m\ 644 BSD_INSTALL=/usr/bin/install BSD_INSTALL_PROGRAM_DIR=/usr/bin/install\ -d\ -o\ pbulkXXX\ -g\ users\ -m\ 755 BSD_INSTALL_SCRIPT_DIR=/usr/bin/install\ -d\ -o\ pbulkXXX\ -g\ users\ -m\ 755 BSD_INSTALL_LIB_DIR=/usr/bin/install\ -d\ -o\ pbulkXXX\ -g\ users\ -m\ 755 BSD_INSTALL_DATA_DIR=/usr/bin/install\ -d\ -o\ pbulkXXX\ -g\ users\ -m\ 755 BSD_INSTALL_MAN_DIR=/usr/bin/install\ -d\ -o\ pbulkXXX\ -g\ users\ -m\ 755 BSD_INSTALL_GAME=/usr/bin/install\ -c\ -s\ -o\ pbulkXXX\ -g\ users\ -m\ 2555 BSD_INSTALL_GAME_DATA=/usr/bin/install\ -c\ -o\ pbulkXXX\ -g\ users\ -m\ 664 BSD_INSTALL_GAME_DIR=/usr/bin/install\ -d\ -o\ pbulkXXX\ -g\ users\ -m\ 775 INSTALL_INFO= MAKEINFO=/data/scratch/cad/py-MyHDL/work/.tools/bin/makeinfo FLEX= BISON= PKG_CONFIG= PKG_CONFIG_LIBDIR=/data/scratch/cad/py-MyHDL/work/.buildlink/lib/pkgconfig:/data/scratch/cad/py-MyHDL/work/.buildlink/share/pkgconfig PKG_CONFIG_LOG=/data/scratch/cad/py-MyHDL/work/.pkg-config.log PKG_CONFIG_PATH= CWRAPPERS_CONFIG_DIR=/data/scratch/cad/py-MyHDL/work/.cwrapper/config /usr/pkg/bin/python3.7 setup.py "install" -c -O1 --root=/data/scratch/cad/py-MyHDL/work/.destdir) running install running build running build_py running install_lib creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7 creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_Cosimulation.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_ShadowSignal.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_Signal.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_Simulation.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_Waiter.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/__init__.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_always.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_always_comb.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_always_seq.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_bin.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_block.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_compat.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_concat.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_delay.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_enum.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_extractHierarchy.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_getHierarchy.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_getcellvars.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_instance.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_intbv.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_join.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_misc.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_modbv.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_resolverefs.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_simulator.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_traceSignals.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_tristate.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_util.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl copying build/lib/myhdl/_visitors.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion copying build/lib/myhdl/conversion/_VHDLNameValidation.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion copying build/lib/myhdl/conversion/__init__.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion copying build/lib/myhdl/conversion/_analyze.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion copying build/lib/myhdl/conversion/_misc.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion copying build/lib/myhdl/conversion/_toVHDL.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion copying build/lib/myhdl/conversion/_toVHDLPackage.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion copying build/lib/myhdl/conversion/_toVerilog.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion copying build/lib/myhdl/conversion/_verify.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_Cosimulation.py to _Cosimulation.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_ShadowSignal.py to _ShadowSignal.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_Signal.py to _Signal.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_Simulation.py to _Simulation.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_Waiter.py to _Waiter.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/__init__.py to __init__.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_always.py to _always.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_always_comb.py to _always_comb.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_always_seq.py to _always_seq.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_bin.py to _bin.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_block.py to _block.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_compat.py to _compat.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_concat.py to _concat.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_delay.py to _delay.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_enum.py to _enum.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_extractHierarchy.py to _extractHierarchy.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_getHierarchy.py to _getHierarchy.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_getcellvars.py to _getcellvars.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_instance.py to _instance.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_intbv.py to _intbv.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_join.py to _join.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_misc.py to _misc.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_modbv.py to _modbv.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_resolverefs.py to _resolverefs.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_simulator.py to _simulator.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_traceSignals.py to _traceSignals.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_tristate.py to _tristate.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_util.py to _util.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/_visitors.py to _visitors.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/_VHDLNameValidation.py to _VHDLNameValidation.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/__init__.py to __init__.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/_analyze.py to _analyze.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/_misc.py to _misc.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/_toVHDL.py to _toVHDL.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/_toVHDLPackage.py to _toVHDLPackage.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/_toVerilog.py to _toVerilog.cpython-37.pyc byte-compiling /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/_verify.py to _verify.cpython-37.pyc writing byte-compilation script '/tmp/tmpy3s2dagn.py' /usr/pkg/bin/python3.7 /tmp/tmpy3s2dagn.py File "/usr/pkg/lib/python3.7/site-packages/myhdl/_always_seq.py", line 48 def __init__(self, val, active, async): ^ SyntaxError: invalid syntax File "/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/_toVHDL.py", line 1841 async = reset is not None and reset.async ^ SyntaxError: invalid syntax removing /tmp/tmpy3s2dagn.py running install_data creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver copying cosimulation/cver/myhdl_vpi.c -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver copying cosimulation/cver/Makefile.lnx -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver copying cosimulation/cver/Makefile.lnx64 -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver copying cosimulation/cver/Makefile.osx -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver copying cosimulation/cver/README.txt -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver/test copying cosimulation/cver/test/bin2gray.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver/test copying cosimulation/cver/test/dff.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver/test copying cosimulation/cver/test/dff_clkout.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver/test copying cosimulation/cver/test/inc.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver/test copying cosimulation/cver/test/test_all.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/cver/test creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus copying cosimulation/icarus/myhdl.c -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus copying cosimulation/icarus/myhdl_20030518.c -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus copying cosimulation/icarus/myhdl_table.c -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus copying cosimulation/icarus/Makefile -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus copying cosimulation/icarus/README.txt -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus/test copying cosimulation/icarus/test/bin2gray.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus/test copying cosimulation/icarus/test/dff.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus/test copying cosimulation/icarus/test/dff_clkout.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus/test copying cosimulation/icarus/test/inc.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus/test copying cosimulation/icarus/test/test.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus/test copying cosimulation/icarus/test/test_all.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus/test copying cosimulation/icarus/test/test_gray.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus/test copying cosimulation/icarus/test/tb_test.v -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/icarus/test creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim-win copying cosimulation/modelsim-win/myhdl_vpi.c -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim-win copying cosimulation/modelsim-win/Makefile -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim-win creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim-win/test copying cosimulation/modelsim-win/test/bin2gray.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim-win/test copying cosimulation/modelsim-win/test/dff.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim-win/test copying cosimulation/modelsim-win/test/dff_clkout.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim-win/test copying cosimulation/modelsim-win/test/inc.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim-win/test copying cosimulation/modelsim-win/test/test_all.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim-win/test creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim copying cosimulation/modelsim/myhdl_vpi.c -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim copying cosimulation/modelsim/Makefile -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim/test copying cosimulation/modelsim/test/bin2gray.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim/test copying cosimulation/modelsim/test/dff.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim/test copying cosimulation/modelsim/test/dff_clkout.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim/test copying cosimulation/modelsim/test/inc.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim/test copying cosimulation/modelsim/test/test_all.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/modelsim/test creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test copying cosimulation/test/bin2gray.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test copying cosimulation/test/dff.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test copying cosimulation/test/dff_clkout.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test copying cosimulation/test/inc.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test copying cosimulation/test/test_all.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test copying cosimulation/test/test_bin2gray.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test copying cosimulation/test/test_dff.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test copying cosimulation/test/test_inc.py -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test creating /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test/verilog copying cosimulation/test/verilog/bin2gray.v -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test/verilog copying cosimulation/test/verilog/dff.v -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test/verilog copying cosimulation/test/verilog/dff_clkout.v -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test/verilog copying cosimulation/test/verilog/dut_bin2gray.v -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test/verilog copying cosimulation/test/verilog/dut_dff.v -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test/verilog copying cosimulation/test/verilog/dut_dff_clkout.v -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test/verilog copying cosimulation/test/verilog/dut_inc.v -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test/verilog copying cosimulation/test/verilog/inc.v -> /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/share/myhdl/cosimulation/test/verilog running install_egg_info running egg_info creating myhdl.egg-info writing myhdl.egg-info/PKG-INFO writing dependency_links to myhdl.egg-info/dependency_links.txt writing top-level names to myhdl.egg-info/top_level.txt writing manifest file 'myhdl.egg-info/SOURCES.txt' reading manifest file 'myhdl.egg-info/SOURCES.txt' reading manifest template 'MANIFEST.in' File "/usr/pkg/lib/python3.7/site-packages/myhdl/_always_seq.py", line 48 def __init__(self, val, active, async): ^ SyntaxError: invalid syntax File "/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/_toVHDL.py", line 1841 async = reset is not None and reset.async ^ SyntaxError: invalid syntax warning: no files found matching '*.pdf' anywhere in distribution warning: no files found matching '*.ps' anywhere in distribution warning: no files found matching 'makefile*' anywhere in distribution no previously-included directories found matching '.hg' no previously-included directories found matching 'dist' no previously-included directories found matching 'olddoc' no previously-included directories found matching 'myhdl/old_conversion' no previously-included directories found matching 'myhdl/*/work' no previously-included directories found matching 'myhdl/*/*/work' no previously-included directories found matching 'myhdl/*/*/*/work' no previously-included directories found matching 'myhdl/*/work_vlog' no previously-included directories found matching 'myhdl/*/*/work_vlog' no previously-included directories found matching 'myhdl/*/*/*/work_vlog' no previously-included directories found matching 'myhdl/*/work_vcom' no previously-included directories found matching 'myhdl/*/*/work_vcom' no previously-included directories found matching 'myhdl/*/*/*/work_vcom' warning: no directories found matching 'doc/build/html' warning: no previously-included files found matching 'myhdl/test/conversion/*/*.v' warning: no previously-included files found matching 'myhdl/test/conversion/*/*.vhd' writing manifest file 'myhdl.egg-info/SOURCES.txt' Copying myhdl.egg-info to /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl-0.10-py3.7.egg-info running install_scripts => Automatic manual page handling => Generating post-install file lists pkg_create: can't stat `/data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/__pycache__/_always_seq.cpython-37.pyc' pkg_create: can't stat `/data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/__pycache__/_always_seq.cpython-37.opt-1.pyc' pkg_create: can't stat `/data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/__pycache__/_toVHDL.cpython-37.pyc' pkg_create: can't stat `/data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/__pycache__/_toVHDL.cpython-37.opt-1.pyc' => Checking file-check results for py37-MyHDL-0.10 ERROR: ************************************************************ ERROR: The following files are in the PLIST but not in /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg: ERROR: /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/__pycache__/_always_seq.cpython-37.opt-1.pyc ERROR: /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/__pycache__/_always_seq.cpython-37.pyc ERROR: /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/__pycache__/_toVHDL.cpython-37.opt-1.pyc ERROR: /data/scratch/cad/py-MyHDL/work/.destdir/usr/pkg/lib/python3.7/site-packages/myhdl/conversion/__pycache__/_toVHDL.cpython-37.pyc *** Error code 1 Stop. make[1]: stopped in /data/pkgsrc/cad/py-MyHDL *** Error code 1 Stop. make: stopped in /data/pkgsrc/cad/py-MyHDL